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Copyright Notice 

 

This document is copyrighted, 2002. All rights are reserved. The original 
manufacturer reserves the right to make improvements to the products described 
in this manual at any time without notice. 
No part of this manual may be reproduced, copied, translated or transmitted in any 
form or by any means without the prior written permission of the original 
manufacturer. Information provided in this manual is intended to be accurate and 
reliable. However, the original manufacturer assumes no responsibility for its use, 
nor for any infringements upon the rights of third parties which may result from 
its use. 

 

Acknowledgments 

 

PC-LabCard is a trademark of Advantech Co., Ltd. IBM and PC are trademarks of 
International Business Machines Corporation. MS-DOS, Windows®, Microsoft

®  

Visual C++ and Visual BASIC are trademarks of Microsoft

®  

Corporation. Intel

®

 

and Pentium

®

 are trademarks of Intel Corporation. Delphi and C

++ 

Builder are 

trademarks of Inprise Corporation. 

 

CE notification 

 

The MIC-3620, developed by ADVANTECH CO., LTD., has passed the CE test 
for environmental specifications when shielded cables are used for external 
wiring. We recommend the use of shielded cables. This kind of cable is available 
from Advantech. Please contact your local supplier for ordering information. 

 

On-line Technical Support 

 

For technical support and service, please visit our support website at: 

http://www.advantech.com/support 

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Part No.2003362000        1st Edition 

Printed in Taiwan    December 2002 

Summary of Contents for MIC-3620

Page 1: ...nts PC LabCard is a trademark of Advantech Co Ltd IBM and PC are trademarks of International Business Machines Corporation MS DOS Windows Microsoft Visual C and Visual BASIC are trademarks of Microsoft Corporation Intel and Pentium are trademarks of Intel Corporation Delphi and C Builder are trademarks of Inprise Corporation CE notification The MIC 3620 developed by ADVANTECH CO LTD has passed the...

Page 2: ...2 FEATURES 2 1 3 SPECIFICATIONS 3 HARDWARE CONFIGURATION 5 2 1 INITIAL INSPECTION 6 2 2 HARDWARE INSTALLATION 7 2 3 B OARD LAYOUT DIMENSIONS 9 PIN ASSIGNMENT WIRING 11 3 1 PIN ASSIGNMENTS 12 REGISTER STRUCTURE FORMAT 15 4 1 R EGISTER STRUCTURE 16 ...

Page 3: ...1 Chapter 1 Introduction ...

Page 4: ...upt An interrupt status register is available for determining the interrupt source The MIC 3620 comes standard with 16C954 UARTs containing an optional 128 byte FIFOs These upgraded FIFOs greatly reduce CPU overhead and are an ideal choice for heavy multitasking environments 1 2 Features PCI Specification 2 1x compliant Speeds up to 921 6 Kbps 16C954 UARTs with 128 byte FIFO standard Standard Indu...

Page 5: ...0 UART 2 x 16C954 Speed bps 50 921 6 K Data signals TxD RxD RTS CTS DTR DSR DCD GND for RS 232 Power consumption 5V 2 0A MAX 3 3V 3A 12V 1A Dimensions 160 mm x 100 mm Operating temperature 0 C 70 C referring to IEC68 2 1 2 Operating Humidity 5 95 Relative Humidity non condensing referring to IEC 68 2 1 2 Operating Humidity 5 95 Relative Humidity non condensing referring to IEC 68 2 3 Storage Tempe...

Page 6: ...4 ...

Page 7: ...5 2 Hardware Configuration Chapter ...

Page 8: ...tment or your local sales representative Please also notify the carrier Retain the shipping carton and packing materials for inspection by the carrier Once inspected we will make arrangements to repair or replace the unit When you handling the CPCI communication card series remove its protective packaging by grasping the rear metal panel Keep the anti vibration packaging Whenever you remove the ca...

Page 9: ... into the CPCI chassis carefully by sliding the lower edges of the card into the card guides Step 5 Gently push the card into the slot by sliding the card along the card guide until J1 meets the long needle on the backplane Note If your card is correctly positioned and has slid all the way into the chassis the handle should match the rectangular holes If not remove the card from the card guide and...

Page 10: ...iguration Step 2 Once the system finishes the device configuration the Blue LED on front plane will turn on Now you can slide the card out Note Because the card holds Hot Swap the above steps will remove the card process when the system is on If the system power is off please do step1 and step2 without attending Blue LED s state ...

Page 11: ...9 2 3 Board Layout Dimensions Figure 1 1 MIC 3620 board layout Dimensions Connectors MIC 3620 has a 68 pin SCSI connectors ...

Page 12: ...10 ...

Page 13: ...11 3 Pin Assignment Wiring Chapter ...

Page 14: ...RX3 37 DSR3 35 CTS3 40 DCD3 41 RI3 31 TX4 30 DTR4 28 RTS4 34 RX4 29 DSR4 27 CTS4 32 DCD4 33 RI4 26 GND 22 TX5 21 DTR5 19 RTS5 25 RX5 20 DSR5 18 CTS5 23 DCD5 24 RI5 14 TX6 13 DTR6 11 RTS6 17 RX6 12 DSR6 10 CTS6 15 DCD6 16 RI6 9 GND 5 TX7 4 DTR7 2 RTS7 8 RX7 3 DSR7 1 CTS7 6 DCD7 7 RI7 Table 3 1 MIC 3620 DB78P Connector Pin Assignment Table 3 2 is DB9P Male Connector Description Signal Name Pin Mode ...

Page 15: ...13 The following diagrams show the pin assignments for the MIC 3620 SCSI 68 pin connector Figure 3 1 MIC 3620 RS232 Mode SCSI 68P Connector ...

Page 16: ...14 ...

Page 17: ...15 4 Register structure format Chapter ...

Page 18: ... when DLAB 1 BASE 1 Divisor latch bits 8 15 when DLAB 1 The two bytes BASE 0 and BASE 1 together form a 16 bit number the divisor which determines the baud rate together with the values of TCR and CPR and Bit7 of MCR Modem Control Register refer to 16C954 datasheet The formula to set BaudRate as follows In formula SC is sample clock value defined by TCR when TCR 0x00 SC 16 Prescaler is defined by ...

Page 19: ...le transmitter holding register empty interrupt Bit2 Enable receiver line status interrupt Bit3 Enable modem status interrupt BASE 2 read Interrupt status register ISR BASE 2 write FIFO Control Register FCR Bit0 Enable transmit and receive FIFO Bit1 Clear contents of receive FIFO Bit2 Clear contents of transmit FIFO Bits6 7 Set trigger level for receiver FIFO interrupt Table 4 3 Bit 7 Bit 6 FIFO T...

Page 20: ...4 Modem Control Register MCR Bit 0 DTR Bit 1 RTS Bit 3 Interrupt enable by software Bit 7 Baud prescale select BASE 5 Line Status Register LSR Bit 0 Receiver data ready Bit 1 Overrun error Bit 2 Parity error Bit 3 Framing error Bit 4 Breaks interrupt Bit 5 Transmitter holding register empty Bit 6 Transmitter shift register empty Bit 7 At least one parity error framing error or break indication on ...

Page 21: ...er MSR Bit 0 Delta CTS Bit 1 Delta DSR Bit 2 Trailing edge ring indicator Bit 3 Delta received line signal detect Bit 4 CTS Bit 5 DSR Bit 6 RI Bit 7 DCD BASE 7 Temporary data register and indexed control Register offset value bits ...

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