Zenith XBR411, Manual

Page: 58 / 165

3-70
4. CPU & Control Register BLOCK DIAGRAM
F
lash
Me
m
o
ry
IC301
F
lash
Me
m
o
ry
IC301
HD[
15
:0]
HD[
15
:0]
B
A
[21:
6
]
E5
_
A
L
E
BA
[5
:1
,2
2
]
B
A
[20:
1
]
FCS0 E5_W
EL
E5_O
E
RST
GE
N
Block
RST
GE
N
Block
/SRE
SE
T
E5_RS
T
/RST
_
S
MS
C
Inv
erter
IC409
Inv
erter
IC409
B
A
[21:
20
]
IRQ
Vid
eo
Contr
o
l
Block
Vid
eo
Contr
o
l
Block
S
_JA
CK_D
ET
/B
A[
2
:20
]
SM
SC
_
IR
Q
AV
_
R
ST
/RST
_
V
DE
C
/RST
_
V
E
N
C
/RST
_
P
H
Y
/RST
_
A
UDIO
Co
nne
cto
r P
N
3
0
2
Co
nne
cto
r P
N
3
0
2
Co
nne
cto
r P
N
3
0
2
Co
nne
cto
r P
N
3
0
2
Co
nne
cto
r P
N
3
0
4
Co
nne
cto
r P
N
3
0
4
Co
nne
cto
r P
N
3
0
4
Co
nne
cto
r P
N
3
0
4
I/P
D_
CO
NT
VDR_
RES
E
T
_
L
INT
_
P
R
O
G
D_
CT
R
S_
DE
T
_
H
E5
B
G
A
3
08
E5
B
G
A
3
08
E5
B
G
A
3
08
E5
B
G
A
3
08
DM
N
8
6
0
2
DM
N
8
6
0
2
DM
N
8
6
0
2
DM
N
8
6
0
2
IC
0
IC
0
IC
0
IC
0
HD[
0
:1
5]
E
5
_M
A
[1
:5
,22
:26]
Buffe
r
IC406
DDR
Me
m
o
ry
IC1202
DDR
Me
m
o
ry
IC1203
SD
R
A
M_A
[15:0
]
CL
KE,
S
D
R
A
M
_
C
L
K
,
RA
S,C
A
S,W
E
S
D
RA
M
_
DQS
[3
:2]
S
D
RA
M
_
DQM
[3
:2]
S
D
RA
M
_
DQS
[1
:0]
S
D
RA
M
_
DQM
[1
:0]
S
D
RA
M
_
DQ[
15
:0]
S
D
R
A
M
_
DQ[
31
:16]