CLM920_NC3_LTE Module Hardware User Guide
Shang Hai YUGE Information Technology co., LTD
Page 17 of 37
Symbol
Description
Min
Typical
Max
Unit
Ton
Boot low level width
100
500
-
mS
Ton(status)
Boot time (according to status status)
22
-
-
S
Ton(usb)
Boot time (according to usb status)
-
20
-
S
Ton(uart)
Boot time (according to uart status)
-
20
-
S
VIH
PWRKEY input high level
0.6
0.8
1.8
V
VIL
PWRKEY input low level
-0.3
0
0.5
V
3.4.2 Power-off shutdown
If the CLM920_NC5 Mini PCIE module is to be shut down, the VBAT power supply can be cut off. At
this time, the module does not perform the normal shutdown process. It is recommended that the
module be powered off and restarted only when the module fails to restart. It is recommended that the
interval between restarts be greater than 30S.
3.4.3 Reset control
CLM920_NC5 Mini PCIE module PIN22 signal is RESET reset pin. When the application needs to reset
the module, the module can be reset by pulling the pin low for 150-450ms. The RESET pin is sensitive to
interference and is away from RF interference signals when routing.
Figure 3-8 Reset Reference Circuit
Table 3-6 RESET pin parameters
Symbol
Description
Min
Typical
Max
Unit
Treset
Low pulse width
150
200
450
ms
VIH
RESET input high level voltage
1.17
1.8
2.1
V
VIL
RESET input low level voltage
-0.3
0
0.8
V
The reset RESET timing is as follows: