Yamaha YDS-12, Service Manual

Page: 10 / 12

A B C D E F G H I J
1
2
3
4
5
6
7
10
YDS-12
★
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★
Components having special characteristics are marked ⚠ and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
● 電圧は、内部抵抗 10MΩの電圧計で測定したものです。
● ⚠印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
● 本回路図は標準回路図です。改良のため予告なく変更することがあります。
IC3
IC4
CB1
IC9
IC5
IC6
IC8
IC7
CB2
0
0
2.1
2.1
0
0
3.4
0
0
3.1
3.4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
3.4
0
0
3.4
0
0
0
0
3.4
5.2
0
0
0
0
0
0
0
0
0
0
0
0
3.4
0
0
3.3
3.4
0
2.2
0
0
0
0
0
5.2
5.2
5.1 3.4
0
3.4
0
0
3.4
3.4
0
3.4 3.4
3.4
1.
7
0
1.
7
3.4 3.4 3.4 3.4
3.3 3.3 3.3 0 3.4 3.3 3.4 0 3.4 0
0
3.4
0
3.4 3.4 0
3.4
3.4
3.4
0
3.4
3.4
3.4
0
3.3
3.4
3.4
3.4
3.4
3.4
0
3.4
0
3.4
3.4
3.4
3.4
3.4
3.4
3.3
3.4
3.4
3.4
3.4
3.3
0
3.4
0
3.4
0
0
0
0
0
A
1
B
2
POINT A XL1 (Pin 4 of IC5) 1 IC5
(VCC)
IC5
(RESET)
2
1 IC5
(VCC)
IC5
(RESET)
2
POINT B 1 / IC5 (7 pin, VCC), 2 / IC5 (3 pin, RESET)
AC POWER ON
(Connect the power cable)
AC POWER OFF
(Disconnect the power cable)
AC POWER OFF
(Disconnect the power cable)
iPod_L
IC6 : MFI341S2164
IC digital
H8/300H
MICROPROCESSOR
System control
I/O port
P4/IRQ
P3/IRQ
P2/IRQ
P1/IRQ
RES
Internal address bus
Internal data bus
11
12
14
15
16 17 18 19 20
10
Vss
NC
P2/IRQ
Top view
9 8 7 6
13
5
4
2
1
3
Vcc
Vss
RNG
WDT
FMU
Voltage monitoring circuit
Security logic
ROM (112 kbytes)
RAM (4 kbytes)
Interval timer 1
Interval timer 2
Register
(512 bytes)
Modular multiplication
coprocessor
EEPROM (16 2 kbytes)
On-chip
oscillator
Power-on
reset circuit
P1/IRQ
P3/IRQ
Vcc
NC
NC
NC NC NC NC NC
NC NC NC NC NC
RES
P4/IRQ
1
3
2
5
4 GND
V
CC
IC9 : TC7SH08FU
2-input AND gate
IN A
IN B
OUT Y
IC3, 4 : TC74VHC153FT
Dual 4-channel multiplexer
14 A
S0
S0
6
1C0
2 B
S1
S1
S2
S2
S3
S3
S0
7 1Y
5
1C1
S1
4 1C2
S2
1 1G
3 1C3
S3
10 2C0
S0
9
2Y
11 2C1
S1
12 2C2
S2
15 2G
13 2C3
S3
IC8 : R1114Q331D-TR
Low noise 150 mA LDO regulator
V DD
CE
Vref
Current Limit
V
OUT
GND
V
DD
C D
R
D
Vref
GND
OUT
IC7 : R3112Q221A-TR-F
Nch open drain type
20 6
16 10
1 5
15 11
MFI341S2164 TC7SH08FU
1
3
4
5
TC74VHC153FT
1
8
16
R5F21284SNSP
1
10
20
R1114Q331D-TR
4 2
1
R3112Q221A-TR-F
Anode
Cathode
RSB6.8S 6.8V 1SS400TE61 RB521S-30TE61
2
1
1: GND
2: IN
3: OUT
3
DTC114EKA 2SK3019TL
PIN CONNECTION DIAGRAMS OF TRANSISTOR, DIODE AND ICS.
Anode
Cathode
Anode
Cathode
G
S
D
T
o iP
od t
er
minal
B A
T
o RECEIVER (DOCK)
MICRO-
PROCESSOR
MULTIPLEXER
AUTHENTICATION IC
REGULATOR
MODE SWITCH
The voltage is measured with the dock-compatible component.
電圧はDOCK対応機器を接続して測定したものです。
■
SCHEMATIC DIAGRAM
FOR INFORMATION ONLY (NO REPLACEMENT COMPONENT PARTS WILL BE AVAILABLE)
DRAFT