Yamaha RX-V767, Service Manual

Page: 118 / 164

A
1 2 3 4 5 6 7 8 9
10
BCD
E
F
G
H
I
J
K
L
M
N
RX-V767/HTR-7063/RX-A800
118
DIGITAL 6/7
★
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★
Components having special characteristics are marked
⚠
and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
●
電圧は、内部抵抗
10MΩの電圧計で測定したものです。
●
⚠印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、 パーツリストに記載されている部品を使用してください。
●
本回路図は標準回路図です。改良のため予告なく変更することがあります。
IC908
IC909
IC911
IC911
IC911
IC913 IC913 IC913 IC913 IC914 IC914 IC914 IC914
IC911
IC912 IC912
IC905 IC904
IC910
IC903
IC901 IC902
IC906
IC907
CB902
CB903 CB904
CB905
CB919
CB908 CB906
CB909 CB907
CB910
CB912 CB911
CB921
CB920
IC915
CB918 CB917
CB916
CB915
CB914
CB913
CB901
FR
ONT L
CENTER/SUB
W
OOFER
SURR
OUND L
SURR
OUND B
A
CK L
DIGIT
AL IN
ANAL
OG IN
3.4
2.8 2.8 2.8 2.8 2.8 2.8 2.8 2.8
1.2 2.1 2.4
3.3
0 0
3.4
3.4
3.4
3.4
3.4 3.4 3.4
3.4
1.7 3.3 3.3 1.1 1.1 0.4
3.4 3.4 3.4
0
3.3
0.2 0 0
3.4
3.4 3.4
3.4
1.7
3.3 3.3
3.3
3.3
3.3
3.4
3.4 3.4
3.4
3.4 3.4 3.3
3.1 3.3
0 0 0
3.4 0 0
0 0
0
0
2.9
3.3 3.4
2.8
5.0 5.0
0
3.3 1.7 1.7 1.7 1.7 1.3 1.3 1.3 1.6
0 0
0
0
1.1 5.0 3.3 3.3 3.3 3.3 3.2 5.0 5.0
-11.6
3.4 3.4
3.4
3.3 3.4 0
0
0
3.3
0
-11.6
0 0 0 0 0
1.2 3.3 3.3
1.3
1.3
1.6
0
5.0
0 0 0 0 0 0 0 0 0 0 0
0 0
0.2 0.5 0.4 4.3
3.4
3.4
3.3 3.3
3.3
3.3
3.0
2.8
2.8
2.8
2.8
0
0
0
2.4
1.9
1.9
1.5
1.8
0
0
0
0
0
0
0
0
0
0
0
0.2
1.9
0.9
0.9
3.3
3.3
3.4
1.5
0.7
3.4
3.3
2.8
2.8
2.8
2.8
2.8
2.8
2.8
3.4
2.8
3.4
0
0
2.8
2.8
2.8
2.8
2.8
2.8
2.8
2.8
0
0
2.8
2.8
2.8
2.8
3.3
3.3
3.4
3.3
2.8
2.8
2.8
2.8
2.8
2.8
0.7
0.7
2.8
2.4
1.9
0.9
1.9
1.9
0
0
0
0
0
0
0
0
0
0.9
0
3.4
1.5
3.4
3.4
3.4
3.4
3.4
3.4
0
0
1.6
1.7
1.7
3.4
3.4
0
0
0
0
0
0
3.4
3.4
3.3
3.3
3.3
0
0
0
3.3
0.7 3.4 1.2
1.2
3.3
0
0
0
0
1.1
3.4
3.4
0
0
0
1.2
2.1
2.4
3.3
3.3
3.3
1.2
2.1
2.4
0
1.5
1.7
0.8
3.3
0
0
0
3.3
3.3
3.3
3.3
3.3
3.4
3.3
3.4
3.4
3.5
3.1
3.1
0
0
1.8
1.5
3.3
0
0
3.3
2.8
2.8
2.8
2.8
3.3
0
3.3
3.3
2.8
2.8
2.8
2.8
3.4
1.2
3.4
0
3.4
3.4
0
3.4
3.4
3.4
3.4
0
3.4
0
0
3.4
3.4
-11.6
3.4
3.3
3.4 -11.6
3.3
3.4 -11.6
3.3
3.4 -11.6
2.7
3.4 3.3
2.8
3.4 3.3
2.8
3.4 3.3
2.8
3.4 3.3
-11.6
5.5 5.5
5.0
5.0
3.3
5.0
0
0 0
0
3.3
3.3
3.3
3.4
3.4
5.0
4.9 5.0 0
0
5.0
5.0
3.3 3.2
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
5.0
3.3
3.2
4.9
0
0
3.4
1.5
0
3.4
0.8
0
1.2
3.3
3.3
2.8
0
0
0
0
-11.6
-11.6
0.7
1.2
3.4
3.4
3.4 2.7
2.7
0.4
3.3
0
0
0
0
0
0
0
0
0
0
-11.6
-11.6
-11.6
3.4
0
0
3.1
3.4
3.3
0
3.4
5.5
0
3.3
3.4
5.5
0
5.5
0.4
3.1
3.4
1.2
0
0.4
3.1
3.4
1.2
0
0.4
3.1
3.4
0.7
0
0.4
3.1
0
0
0
0
0
3.4
3.3
3.3
3.3
3.3
3.3
3.4
3.4
3.2
3.2
3.2
0
0
0
0
0
0
3.3
3.3
3.3
2.9
5.5
2.7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3.3
3.4
3.3
3.3
3.3 3.3
0
0
0 0 0
0 0
C
1
D
2
POINT
C XL90
1 (Pin 20 of IC908)
1
IC908
(+3.3M)
IC908
(MCPU_N_RESET)
2
1
IC908
(+3.3M)
IC908
(MCPU_N_RESET)
2
A
C
PO
WER ON
(C
onnect the po
w
er cab
le)
A
C
PO
WER ON
(C
onnect the po
w
er cab
le)
A
C
PO
WER OFF
(Disconnect the po
w
er cab
le)
POINT
D 1 / IC908 (1
42 pin, +3.3M), 2 / IC908 (1
9 pin, MCPU_N_RESET)
IC903
: LE25LB2562M-TLM-E
256 k-bit serial SPI EEPROM
SERIAL INTERFACE
Y ·DECODER
1 2 3 4
VSS
WP#
SO
CS#
SI SCK HOLD# VDD
8 7 6 5
X ·
DECODER
EEPROM Cell Array
CONTROL
LOGIC
I/O BUFFERS
and
DATA LATCHES
ADDRESS
BUFFERS
and
LATCHES
CS#
SCK
SI
SO
WP#
HOLD#
V
DD CE
Vr
ef
43 12
Curr
ent Limit
V
OUT
GND
Pin No
.
1 2 3 4
S
ymbol V
OUT
GND
CE V
DD
Descr
iption
Output Pin Gr
ound Pin
Chip Enab
le ("H"
A
ctiv
e
)
Input Pin
IC91
5
: RP1
30Q50
1D-TR-F
V
olt
age r
egulat
or
A
H
L
H
L
H
L
L
HH
H H
L
BY
1 3 2
5 4
GND
V
CC
IC91
0
:
TC7SH32FU
2-input OR gate
IN A IN B
OUT Y
IC913
: TC74VHCT08AFT
Quad 2-input AND gate
Vcc
14
4B 4A 4Y 3B 3A 3Y
1A
1 2 3
13 12 11 10
9 8
4 5 6 7
1B 1Y 2A 2B 2Y
GND
IC914
: TC74VHC08FT
Quad 2-input AND gate
Vcc
14
4B
13
4A
12
4Y
11
3B
10
3A
9
3Y
8
1A
1
1B
2
1Y
3
2A
4
2B
5
2Y
6
GND
7
IC90
1,
902
: SN7
4L
V4051APWR
8-channel analog m
ultiple
x
e
rs/dem
ultiple
x
e
rs
Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 COM
INH
C B A
11 10 9 6
3
13 14 15 12
1 5 2 4
1 2 3 4 5 6 7 8
9
10 16 15 14 13 12 11
Y4 Y6
COM
Y7 Y5
INH
GND GND
V
CC
Y2 Y1 Y0 Y3 A B C
INPUTS
ON
CHANNEL
INH
L L L L L L L L H
L L L H H H H X C L
L H H L L H H X L
H
L
H
L
H
L
H X
L
Y1 Y2 Y3 Y4 Y5 Y6 Y7
None
Y0
BA
A15 A14 A13 A12 A11 A10
A9 A8
A19 A20
WE#
RESET#
A21
WP#/ACC
RY/BY#
A18 A17
A7 A6 A5 A4 A3 A2 A1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
A16 BYTE# GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC Q11 Q3 Q10 Q2 Q9 Q1 Q8 Q0 OE# GND CE# A0
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
MX29L
V640EBTI-70G
CONTROL
INPUT LOGIC
PROGRAM/ERASE HIGH VOLTAGE
WRITE STATE
MACHINE
(WSM)
STATE REGISTER
FLASH ARRAY
X-DECODER
ADDRESS
LATCH
AND
BUFFER
Y-PASS GATE
Y-DECODER
ARRAY
SOURCE
HV
COMMAND
DATA DECODER
COMMAND
DATA LATCH
I/O BUFFER
PGM DATA
HV
PROGRAM
DATA LATCH
SENSE
AMPLIFIER
Q0-Q15/A-1
A0-AM
AM: MSB address CE# OE# WE#
RESET#
BYTE#
WP#/ACC
IC909
: MX29L
V640EBTI-70G
64 M-bit single v
olt
age 3
V onl
y f
lash memor
y
IC908
: R5F641
69DFD
Single chip 32-bit micr
opr
ocessor
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
8
8
8
8
8
8
8
Port P7 P8_5 Port P9 Port P10
8 7 8 8
Peripheral functions
Timer:
Timer A 16 bits × 5 timers Timer B 16 bits × 6 timers
Three-phase motor
controller
Watchdog timer:
15 bits
D/A converter:
8 bits × 2 channels
A/D converter: 10 bits × 1 circuit
Standard: 10 inputs
Maximum: 34 inputs
Serial interface:
9
channels
X-Y converter:
16 bits × 16 bits
Clock generator:
4 circuits - XIN-XOUT - XCIN-XCOUT - On-chip oscillator - PLL frequency synthesizer
DMAC
CRC calculator (CCITT)
X
16
+ X
12
+ X
5
+ 1
Intelligent I/O
Time Measurement: 16 Wave generation: 24 Serial interface: - Variable-length
synchronous serial I/O
- IEBus
(1)
R32C/100 Series Microprocessor Core
R2R0
FLG
INTB
ISP
USP
PC SVF
SVP VCT
R2R0 R3R1 R6R4 R7R5
A0 A1 A2 A3 FB SB
Memory
ROM RAM
Multiplier
Port P14
Port P14_1
Port P11
Port P12
Port P13
4
5
8
8
DMAC II
Floating-point unit
Port P8
Port P15
8
Note:
1. IEBus is a trademark of NEC Electronics Corporation.
Multi-master I
2
C-bus
Interface: 1 channel
V
DD
CE
Vr
ef
43 12
Curr
ent Limit
V
OUT
GND
Pin No
.
1 2 3 4
S
ymbol
V
OUT
GND
CE
V
DD
Descr
iption
Output Pin Gr
ound Pin
Chip Enab
le ("H"
A
c
tiv
e
)
Input Pin
IC906,
907
: RP1
30Q331D-TR-F
V
olt
age r
egulat
or
IC912
: SN74LVC1G17DCKR
Single schmitt-trigger buffer
1 2 3
5 4
NC
A
GND
V
CC
Y
INPUT
A
OUTPUT
Y
L
H
L
H
IC904, 905
: TC74VHC273FT (EL,K)
Octal D-type flip-flop with clear
1
CLR
Q1 Q2 Q3 Q4
GND
D1 D2 D3 D4
2 3 4 5 6 7 8 9
10
DC
K
CLR
L H H H
XX L H X
1 11
3
2
D
R
CK
Q
D1
Q1
CLR
CK
Q L L H
Q
n
Inputs
Output
Function
Clear
− −
No Change
20
V
CC
Q8 Q7 Q6 Q5 CK D8 D7 D6 D5
19 18 17 16 15 14 13 12 11
4
5
D
R
CK
Q
D2
Q2
7
6
D
R
CK
Q
D3
Q3
8
9
D
R
CK
Q
D4
Q4
13
12
D
R
CK
Q
D5
Q5
14
15
D
R
CK
Q
D6
Q6
17
16
D
R
CK
Q
D7
Q7
18
19
D
R
CK
Q
D8
Q8
IC911
: TC74VHC86FT (EL)
Quad exclusive OR gate
Vcc
14
4B
13
4A
12
4Y
11
3B
10
3A
9
3Y
8
1A
1
1B
2
1Y
3
2A
4
2B
5
2Y
6
GND
7
LL LH HH H
L
AY
B H L HL
IC903
: LE25CB5122M-TLM-E
512 k-bit serial SPI EEPROM
(U model)
(C, R, T, K, A, B, G, F, L, J models)
SERIAL INTERFACE
Y-DECODER
1 2 3 4
VSS WP#
SO
CS#
SI SCK HOLD# VDD
8 7 6 5
X-
DECODER
EEPROM Cell Array
CONTROL
LOGIC
I/O BUFFERS
and
DATA LATCHES
ADDRESS BUFFERS
and
LATCHES
CS#
SCK
SI
SO
WP#
HOLD#
MICROPROCESSOR
R91
69
RX-V767/HTR-7063 RX-A800
2.2K
no_use
R91
70
2.2K
no_use
DIGITAL (1)
To DIGITAL 7/7
To DIGITAL 7/7 To DIGITAL 7/7
To DIGITAL 3/7
To DIGITAL 4/7
To DIGITAL 3/7
To DIGITAL 2/7
To DIGITAL 1/7
To DIGITAL 7/7
RX-A800
(U model)
RX-A800 (U model)
No replacement part available.
サービス部品供給なし
to DIGITAL (3)_W9801
(RX-A800 model)
Page 117
J3
to OPERATION (1)_CB401
Page 120
F10
to OPERATION (2)_CB461
Page 121
H3
to OPERATION (2)_CB460
Page 121
E3
to OPERATION (2)_CB459
Page 121
C3
to VIDEO (4)_W3601 Page 126
C2
to VIDEO (3)_CB382 Page 126
I9
to VIDEO (1)_CB349
Page 125
G8
to MAIN (1)_CB156
Page 123
K7
to MAIN (5)_CB107
Page 122
J7
to OPERATION (7)_CB491
Page 121
F2
Writing port
(For service)