A
1
2
3
4
5
6
7
8
9
10
BCD
E
F
G
H
I
J
K
L
MN
RX-V559/HTR-5950/DSP-AX559
SCHEMA
TIC DIA
GRAMS
81
★
All v
oltages are measured with a 10M
Ω
/V DC electronic v
olt meter
.
★
Components ha
ving special char
acter
istics are mar
k
ed
s
and m
ust be replaced
with par
ts ha
ving specifications equal to those or
iginally installed.
★
Schematic diag
ram is subject to change without notice
.
DSP 1/3
5.0
-11.9
4.9
5.0
5.0
4.3
5.0
-11.9
4.9
5.0
-11.9
4.9
5.0
5.0
4.3
00
.2
5.0
0
5.0
0.1
0
1.2
3.3
0.1
0
0.2
5.0
5.0
5.0
5.0
5.0
0.1
0.1
0.1
10.1
0
5.8
5.8
5.8
5.2
5.2
5.2
5.0
5.0
5.0
4.3
0.1
0.1
4.9
0
5.1
4.9
5.0
5.0
0.4
0
2.7
0
2.0
0
2
1
B-2
5.0
0.1
0
0
0
0
0
0
0
0
0
0
0
0
0
2.7
2.0
0.4
5.0
1.0
5.2
5.2
0
4.3
5.2
4.9
4.9
4.9
4.9
4.8
0.5
0.6
0.1
4.9
0
0
5.0
5.0
5.0
4.9
2.5
0
2.4
5.0
5.0
5.0
0
5.0
5.0
5.0
5.0
5.0
0
0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
0.1
5.0
0
5.0
5.2
4.9
4.9
4.9
0
0
0
0
0
0
0
5.0
4.9
4.9
4.9
4.9
0.1
0.1
0.1
0.1
4.9
5.0
0
0
5.0
0
0.1
4.9
0
0
0
0
0.1
4.8
5.0
5.0
5.0
4.9
0.1
5.0
5.0
4.9
4.9
0
0
5.9
0
4.9
4.9
0
0
0
5.0
0.1
0
0
0
0
0
0
A-1
to FUNCTION (1)_CB200
Page 84
C1
to FUNCTION (2)_CB291
Page 84
I3
to OPERA TION (4)_W3009
to MAIN (1)_W1007
Page 87
H2
to MAIN (1)_W1026
Page 87
H2
to OPERA TION (1)_CB302
to OPERA TION (1)_CB309
HTR-5950: P
age 86
D8
RX-V559/DSP-AX559: P
age 85
D9
to FLASH WRITER
HTR-5950: P
age 86
J5
RX-V559/DSP-AX559: P
age 85
I4
DSP
MICR
OPR
OCESSOR
M30625MHP-A98GP
2
1
3
Vref
V
OUT
GND
V
IN
–
+
IC1
: RH5RE58AA-T1-F
A
V
oltage regulator
Y
4
B2
GN
D
3
IC4,
5
: SN74AHCT1G32DCKR
Single 2-input positiv
e-OR gak
e
Vc
c
5
A1
Y
4
B2
GN
D
3
IC6
: SN74AHC1G08DCKR
2-input positiv
e-AND gate
IC2
: M30625MHP-A98GP
2-input positiv
e-AND gate
Vc
c
5
A1
POINT
A-1 Pin 18 of IC2
POINT
B-2 1 / Pin7, 2 / Pin8 of CB3
PO
WER ON
(connect the po
w
er cab
le)
8
(3)
(3)
(3)
(3)
88
8
2
Po
rt
P
0
P
o
rt
P11
P
o
rt
P14
P
o
rt
P12
<VCC2 por
ts> (4)
<VCC1 por
ts> (4)
NO
TES:
1.
R
O
M siz
e depends on microcomputer type.
2.
RAM siz
e depends on microcomputer type.
3.
P
o
rt
s P11 to P14 e
xist only in 128-pin v
e
rsion.
4.
Use M16C/62PT on
VCC1=VCC2.
W
a
tchdog timer
(15 bits)
W
a
tchdog timer
(P
o
lynomial:
X
16
+X
12
+X
5
+1
)
Cloc
k synchronous ser
ial I/O
(8 bit x 2 channels)
W
a
tchdog timer
(15 bits)
XIN-XOUT
XCIN-XCOUT
PLL frequency synthesiz
er
On-chip oscillator
Three-phase motor
control circuit
Timer (16 bit)
Output (timer A):
5
Input (timer B):
6
Inter
nal per
ipher
al functions
M16C/60 ser
ies 16-bit CPU core
Memor
y
Multiplier
RO
M
(1)
RAM
(2)
R0H
R0L
R1H
R2
R3
A0
SB
USP
ISP
INTB
PC
FLG
A1
FB
R1L
DMA
C
(2 channels)
D/A con
v
er
ter
(8 bit x 2 channels)
D/A con
v
e
rter
(10 bit x 8 channels
Expandab
le up to 26 channels
)
UA
R
T
o
r
cloc
k synchronous ser
ial I/O
(8 bit x 8 channels)
Po
rt
P
1
3
P
o
rt
P
1
P
o
rt
P
2
P
o
rt
P
3
P
o
rt
P
4
P
o
rt
P
5
P
o
rt
P
6
Port P7
Port P8
Port P8_5
Port P9
Port P10
88888
8
8
7
8
8
<VCC2 por
ts> (4)
<VCC1 por
ts> (4)
<VCC1 ports> (4)
RX-V559/DSP-AX559 models
no_use (HTR-5950 model)