Yamaha RX-V4600/DSP, Service Manual

Page: 97 / 144

A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V4600/DSP-AX4600
SCHEMATIC DIAGRAM (DUAL 1/3)
97
★
All voltages are measured with a 10M
Ω
/V DC electronic volt meter.
★
Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
0.1 0.1 0.1 3.3 0 0 0.1 0.1 3.3 0 0.1 0.1 3.3 3.3 3.3 0.1 3.3 0 0.1 0.1 0 3.3 0 3.3 0 0.1 0.1 0.1 0.1 1.3 1.3 1.3 1.2 1.7 1.7 1.7 3.3 0 0 0
1.3
1.3
0
0
0
1.7
0
0
0
0
2.5
5.0
5.0
0
2.4
2.5
2.5
1.9
1.7
1.7
1.4
0
1.9
0
0
0
3.2
3.3
1.7
1.4
0
0
2.5
3.3
1.7
5.0
5.0
1.7
1.7
2.4
0
0
0
3.3
0
1.3
1.3
1.3
1.3
0
3.3
1.9
1.3
1.3
1.3
1.3
0
0
1.2
0.1
0.1
0.1
0.1
0.1
0.1
0
3.3
0
0
0.1
0.1
0.1
3.3
0.1
0.1
0.1
0
0
3.3
1.2
1.3
0.1
3.3 0.1 3.3 3.3 3.3 3.3 3.3 1.3 3.3 1.7 0.4 1.2 3.3 0 1.0 1.4 1.0 1.7 1.4 0.9 1.5 1.2 1.8 2.2 1.8 1.5 1.5 3.3 0 2.2 0.9 1.5 1.8 2.3 1.9 0.5 1.2 2.2 2.7 3.2 3.3 0 0 0.4
0
0.1
0.1
3.3
0.1
1.4
3.3
1.6
1.4
0
0
3.3
0
0
3.3
3.3
0.1
3.3
0.1
3.3
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0
1.9
3.3
0
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.2
0.1
3.3
4.9
0
0
0
0
0
0
0 0 0 0 0 0 0 0
0
3.3
3.3
1.2 1.3 1.3 1.3 1.3 1.3 1.3
0
0
0 0 0 0 0 0 0
3.3
3.3
3.3
0 1.7 1.2 1.3 1.2 1.3 1.2 0
3.1
3.1
3.3
3.3
0
0
3.3 5.0
5.0
0
3.3
2.6 5.0
3.3
0
0
5.0
2.6
0
0
5.0
3.2
3.2
0
0
0
0
0
0
0.4
1.5
1.2
1.4
1.0
1.7
1.4
0.9 1.5 1.2 1.8 2.2 1.8 1.5 2.2 0.9 3.3 0.1 1.5 1.8 2.3 1.9 1.4 0.5 1.2
0
2.2 2.7 3.2 1.1 1.1 0.6
0
0
0
0
0.5
0.1
3.3
3.3
3.3
3.3
3.3
0
0
3.3
3.3
1.3
1.7
3.3
1.6
1.6
0
3.3
3.3
1.7
3.3
3.3
3.3
0
0.7
0.7
3.3
0.6
1.8
0.6
3.3
0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1
0
0.6 3.3 3.3 0.1 0.1
0
3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3
0 0
1.8
1.5 0.6 0 1.3 3.3
0.4 1.5 1.2 1.2 1.0 1.8 1.4 2.2 1.0 1.8 1.7 1.5 1.4 2.2 0.9 0.9 0 3.3
3.3
2.3 1.9 1.4 0.5 1.2 2.2 3.3 3.2
2.7 3.2
1.1 1.1 0.6 0.6 1.8 0.6
0
3.3
0.7 0.7
A-1
A-2
POINT A-1 Pin 52 of IC9
POINT A-2 Pin 66 of IC10
DUAL
(1394)
0
0
0 0
0
0
0 0
No service part available
サービス部品供給なし
Page 90
to OPERATION (8)_CB468
I5 C9 Page 85
to DSP_CB501
iLINK(AUDIO)
S400
1/2 fosc
Phase
Comparator
LOGIC VDD (Digital)
LOGIC GND (Digital)
SELECT
FIN
±
A
VCO INHIBIT
PFD INHIBIT
NC
VCO GND
VCO IN
BIAS
VCO VDD
VCO
FIN
±
B
VCO OUT
PFD OUT
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IC1 : TLC2932IPWR
HIGH-PERFORMANCE PHASE-LOCKED LOOP
IC2, 4 : SN74AHCT1G125DCKR
IC7, 17 : SN74LVC1G125DCKR
Single Bus Buffer Gate
1
2
3
OE
A
GND 4
5 VCC
Y
MPEG2 DVB
MPEG2 DSS
DIGITAL VIDEO (DV)
PCM-AUDIO
IEC60958 (S/PDIF)
OR
OR
OR
OR
HSDI 0
ISO
PORT
8
8
8
ISO
HSDI 0
FIFO
4KB
MPEG2 DVB
MPEG2 DSS
DIGITAL VIDEO (DV)
SUPER AUDIO CD
IEC60958 (S/PDIF)
PCM-AUDIO
OR
OR
OR
OR
OR
8
8
8
ISO
HSDI 1
FIFO
4KB
M6
CI P H E R
H / W
AKE
L
E
B
256KB RAM
PROGRAM
MEMORY
AND
COMM
MEMORY
SHARED RAM
1KB 1KB
CONFIGURATION REGISTERS (CFRs)
JTAG
PORT
TIMER 0
WDOG /
TIMER 2
TIMER 1
1394a-2000
LINK LAYER
CORE
PACKETIZER
ARM7TDMI
RISC
CORE
UART
EXT.
MCU
I/F
16
10
20
DATA
ADDRESS
CONTROL
1394a-2000
S400
2-PORT
PHY CORE
CFRs
1394
BUS
ARM
DEBUGGER
MONITOR
CFRs
11
GP I/O
AUDIO
RX
SYT PLL
A SYNC
TX 0 FIFO
2K B
ASYNC
TX 1 FIFO
2K B
ASYNC
RX 0 FIFO
2K B
A SYNC
RX 1 FIFO
2K B
BCAST
RX
FIFO
512 B
M6
CI P H E R
HSDI 1
ISO
PORT
IC9 : TSB43CA42PGF
IEEE 1934a-2000
V V V V V V V V V
CL CC CC SS SS SS SS SS SS
D D D D D D D D P4 /D P4 /D P4 /D P4 /D P4 /D P4 /D P4 /D P4 /D
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
Port 3 Port 4
Port 5
Port 9
A
A
A
A
19
18
17
16
A
A
A
A
A
A
A
A
P9 /SCK /IRQ
P9 /SCK /IRQ
P9 /RxD
P9 /RxD
P9 /TxD
P9 /TxD
5
4
3
2
1
0
1
0
1
0
1
0
5
4
DA
1
/AN
7
/P7
7
DA
0
/AN
6
/P7
6
AN
5
/P7
5
AN
4
/P7
4
AN
3
/P7
3
AN
2
/P7
2
AN
1
/P7
1
AN
0
/P7
0
Port 7
A
20
/TIOCB
2
/TP
7
/PA
7
A
21
/TIOCA
2
/TP
6
/PA
6
A
22
/TIOCB
1
/TP
5
/PA
5
A
23
/TIOCA
1
/TP
4
/PA
4
TCLKD/TIOCB
0
/TP
3
/PA
3
TCLKC/TIOCA
0
/TP
2
/PA
2
TCLKB/TP
1
/PA
1
TCLKA/TP
0
/PA
0
Port A
TP
15
/PB
7
TP
14
/PB
6
TP
13
/PB
5
TP
12
/PB
4
CS
4
/TMIO
3
/TP
11
/PB
3
CS
5
/TMO
2
/TP
10
/PB
2
CS
6
/TMIO
1
/TP
9
/PB
1
CS
7
/TMO
0
/TP
8
/PB
0
Port 8
CS
0
/P8
4
ADTRG/CS
1
/IRQ
3
/P8
3
CS
2
/IRQ
2
/P8
2
CS
3
/IRQ
1
/P8
1
IRQ
0
/P8
0
MD
MD
MD
EXTAL
XTAL
STBY
RES
RESO
NMI
2
1
0
H8/300H CPU
Clock pulse
generator
Interrupt controller
Serial communication
interface
(SCI) 2 channels
×
Watchdog timer
(WDT)
15 14 13 12 11 10 9 8
Address bus
Data bus (upper)
Data bus (lower)
15
14
13
12
11
10
9
8
Port 2
A
A
A
A
A
A
A
A
Port 1
7
6
5
4
3
2
1
0
φ
/P6
7
LWR
HWR
RD
AS
BACK/P6
2
BREQ/P6
1
WAIT/P6
0
RAM
16-bit timer unit
8-bit timer unit
A/D converter
D/A converter
Port 6
Bus controller
Programmable
timing pattern
controller (TPC)
Port B
V
REF
AV
CC
AV
SS
IC10 : HD6413008VF25
16-Bit Microcomputer
V
SS
V
CC
WE
CE
A
18
to A
0
OE
Erase Voltage
Generator
DQ
15
to DQ
0
State
Control
Command
Register
Program Voltage
Generator
Low V
CC
Detector
Address
Latch
X-Decoder
Y-Decoder
Cell Matrix
Y-Gating
Chip Enable
Output Enable
Logic
Data Latch
Input/Output
Buffers
STB
STB
Timer for
Program/Erase
A
-1
BYTE
RESET
RY/BY
Buffer
RY/BY
IC11 : MBM29LV800BE70TN
FLASH MEMORY
1 DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
Vcc
OE
B1
B2
B3
B4
B5
B6
B7
B8
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
IC12, 16 : SN74LVC245APWR
Octal Bus Transceivers with 3-state Outputs
Start-up
circuit Reference
voltage
Thermal
shut down
Error
amp.
Drive
circuit
Saturation
protection
Safe operating
area protection
OUTPUT
GND
INPUT
Over current
protection
IC14 :
µ
PC2933AT-E1
THREE-TERMINAL LOW DROPOUT VOLTAGE REGULATOR
3
2, 4
1
IC19 : SN74LVC2G17DCKR
Dual Schmitt-Trigger Buffer
1
2 5
3
1A
GND
2A 4
6 1Y
VCC
2Y
Y 4
B 2
GND 3
IC18 : SN74AHCT1G32DCKR
SINGLE 2-INPUT POSITIVE-OR GATE
Vcc 5 A 1
V
CC
TC
V
OUT
GND
SUB
IC15 : PST9242NR
System Reset
XTALIN
XTALOUT
FS/SUSPEND
SHUTDOWN/OE
CONFIGURATION
FLASH
OSC.
PLL1
11-BIT P
8-BIT Q
PLL2
11-BIT P
8-BIT Q
PLL3
11-BIT P
8-BIT Q
4 x 3
Switch
Crosspoint
Divider
7-BIT
Divider
7-BIT
Divider
7-BIT
CLKA
CLKB
CLKC
3
4
8
1
5
6
IC5 : CY22381FXCT
PLL