Yamaha RX-V2500, Service Manual

Page: 72 / 119

A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V2500/DSP-AX2500
SCHEMATIC DIAGRAM (DSP 2/2)
72
★
All voltages are measured with a 10M
Ω
/V DC electronic volt meter.
★
Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
11.8
-12.0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
5.0
5.0
~ ~
~~
~ ~
1.8
1.8
2.3
0.6 0.6
0.6 0.6 0.6 0.6 1.1 1.1 1.1 1.1 3.1
2.0
5.0
0.6
0.7
0.7 0.7 0.7
0.6
0
0
2.6
2.6 1.8 1.8 3.4 3.4
2.3 2.0
0.6 0.6
0
0.7 0.7 0.7 0.7
2.2 3.1
~ ~ ~ ~ ~ ~ ~
3.4
3.4
1.8
0
0.1
0.5
0.5
0.5
0.5
2.1
0
1.9
0.3
1.8
0
1.7
0.1 0.1
0.1 0.1
0
1.2 1.2
0.3 0.3 0.3 0.3 2.6
3.4
3.4 3.4
3.4
0.6
0.6
1.1
1.1
1.1
1.1
0.6
0.6
0.6
0.6
5.0
3.4
2.7
3.4
3.4
1.8
1.8
0
0
0
0.1
0.1
0.1
0.1
2.6
0
2.3 2.2
1.9
1.8
1.8
1.8
3.4
5.0
0.1
0
0
0
0
0
0
0
0
5.0
5.0
2.5
2.5
2.5
2.5
0
0
5.0
5.0
2.5
2.5
2.5
0.1
0 0
0 0
0
3.4
1.8
1.8
3.4
1.6
0.1
0
0.2
0.2
1.5
0.2
0.2
0.3
0.5
0.5
2.6
2.1
0
1.8 3.4 0.1
0
1.7
3.4 0.1
0
2.6
2.6
2.6
3.4 3.4
0
1.1 3.4
0.1 0.1 0.1 3.4
3.4 0.3 0.3
2.6
0.3
3.4
3.4
1.7
1.8
1.8
1.8
1.8
1.8
1.4
1.6
1.6
0.1
0
0
0
0
1.5
1.6
0.2
0.2
3.4
2.7
5.0
1.8
0
0.1
0.1
0.1
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
0
0 0
4.5
5.0 1.8 1.8 1.8
0 0 0 0 0
0
5.0 2.5 2.5 5.0
5.0
1.8
1.8
0.2
1.8
3.4
5.0
5.0
2.5
2.5
2.5
2.5
0
3.4
2.7
1.8
1.8
0.2
1.8
3.4
5.0
5.0
2.5
2.5
2.5
2.5
0
3.4
2.7
0
11.7
1.6
1.5
0
-12.0
11.7
1.6
1.6
0
1.6
1.6
-12.0
11.7
0
0
0
-12.0
0
0
0
-12.0
0
1.6
1.6
-12.0
0
0
0
-12.0
0
1.5
1.5
0
1.6
1.6
11.7
0
1.6
1.6
11.7
0
1.6
1.6
11.7
0
1.5
0
PRESENCE L
SURROUND BACK L
CENTER
FRONT L
DIGITAL IN
ANALOG IN
100/16
100/16
100/16 100/16
47/25
100/16
47/35
47/35
47/35
47/35
47/35
47/35
NE5532DR
NE5532DR
NE5532DR
NE5532DR
NE5532DR
NE5532DR
5
6
4
7
2
3
8
1
5
6
4
7
2
3
8
1
3
2
4
1
6
5
8
7
5
6
4
7
2
3
8
1
5
6
4
7
2
3
8
1
5
6
4
7
1
8
2
3
7
8
5
6
1
4
3
2
IC516, 518: YSS930-SZ
DSP
IC517: MSM514260E-60J3R1
4Mbit DRAM
IC519: AK5381VT-E2
96kHz 24Bit
∆Σ
A/D Converter
IC520, IC528 - 530: NJM2068MD-TE2
Dual OP-Amp
IC522, 523: AK4382AVT
D/A Converter
IC524: AK4358VQ
192kHz 24Bit 8ch DAC
Timing
Generator
I/O
Controller
Output
Buffers
Input
Buffers
Input
Buffers
Output
Buffers
I/O
Controller
Column Decoders
RAS
Refresh
Control Clock
14
WE
13
9
9
LCAS
29
UCAS
A0~A8
28
VCC 20
VSS 21
Sense Amplifiers
I/O
Selector
Memory
Cells
OE
27
DQ9~DQ16
Column
Address
Buffers
Internal
Address
Counter
Row
Address
Buffers
On Chip
VBB Generator
Row
Deco-
ders
Word
Drivers
9
9
16 16
8
8
8
8
8
8
DQ1~DQ8
8
8
– +
OUT
1
–IN
1
–V
CC
+V
CC
OUT
2
1
2
3
4 5
+IN
1
–IN
2
+IN
2
– +
6
7
8
Audio
Data
Interface
µ
P
Interface
CSN
De-emphasis
Control
Clock
Divider
MCLK
CCLK
8X
Interpolator Modulator
Modulator
SCF
SCF
8X
Interpolator
CDTI
AOUTL+
VDD
VSS
AOUTL-
AOUTR+
AOUTR-
6
PDN
5
1
7
8
LRCK
BICK
SDTI
4
2
3
9
10
11
12
13
14
DZFL
DZFR
15
16
Control
Register
10 MCLK
3-wire
or 12C
Audio
I/F
DAC
LOUT1+
DATT SCF
PCM
17
LRCK
9
BICK
14 SDTI1
15
SDTI2
16
SDTI3
13 SDTI4
22 DCLK
25 DSDL1
26
DSDR1
27
DSDL2
28 DSDR2
29
DSDL3
30
DSDR3
23 DSDL4
24 DSDR4
DSD
2
LOUT1–
1
DAC
ROUT1+
DATT SCF
SCF
SCF
48
ROUT1–
47
DAC
LOUT2+
DATT
46
LOUT2–
45
DAC
ROUT2+
DATT
44
ROUT2–
43
DAC
LOUT3+
DATT SCF
42
LOUT3–
41
DAC
ROUT3+
DATT SCF
40
ROUT3–
39
DAC
LOUT4+
DATT SCF
38
LOUT4–
37
DAC
ROUT4+
DATT SCF
33
ROUT4–
32
DZF
LRCK 10
SCLK 12
SDTO 9
AINL
∆Σ
Modulator
∆Σ
Modulator
Decimation
Filter
Decimation
Filter
Serial I/O
Interface
2
1
4
AINR
VCOM Voltage Reference
Clock Divider
CKS2
VA
CKS1 CKS0 PDN DIF
15 3 16
AGND DGND VD
6 5
MCLK
7 8 11
13 14
IC525 - 527: NE5532DR
Dual OP-Amp
– +
OUT
1
–IN
1
–V
CC
+V
CC
OUT
2
1
2
3
4
5
+IN
1
–IN
2
+IN
2
– +
6
7
8
IC532: 74VHC157MTCX
Quad 2-Input Multiplexer
1
S
10
I1d
15
E
11
I0d
9 Zd
13
I1c
14
I0c
12 Zc
6
I1b
5
I0b
7 Zb
3
I1a
2
I0a
4 Za
MICROPROCESSOR
INTERFACE
EXTERNAL RAM
INTERFACE
CONTROL REGISTER
SDBCK
O
MPLO
AD
/CS SO SI SCK IOPOR
T19~0
CASN RASN
RAMWEN
RAMOEN
SDO0
SDI0
SDI1
SDI2
SDI3
SDI4
SDI5
SDI6
SDI7
SDBCK
SDWCK
XO
XI
CPO
SDI INTERF
A
C
E
SDO1
SDO2
SDO3
SDO4
SDO5
SDO6
SDO7
32 bit DSP Core
PLL
DSP INTERNAL
OPERATING CLOCK
CK (30.72~40.96MHz)
COEFFICIENT
RAM
16 bit ＊ 1024 word
PROGRAM
RAM
50 bit ＊ 1024 word
ADDRESS
RAM
17 bit ＊ 256 word
CONTROL
SIGNALS
RAMD15~0
RAMA17~0
BCK
O
P
SD
WCK
O
WCK
OP
OV
F
END
D
A
T
A
RAM
32 bit
＊
1024
word
SDO INTERF
A
C
E
ZER
OF7R-0L
A/D CONVERTER
DRAM
DSP DSP
DAC
D/A CONVERTER
O : USED / APPLICABLE
X : NOT USED
Page 80
to CONTROL (AUDIO)_CB502_19Pin
A1 Page 78 B1
to INPUT_W301