RS7000
27
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
MD1
MD2
Vcc(RTC)
XTAL2
EXTAL2
Vss(RTC)
NMI
IRQ0//IRL0/PTH0
IRQ1//IRL1/PTH1
IRQ2//IRL2/PTH2
IRQ3//IRL3/PTH3
IRQ4/PTH4
D31/PTB7
D30/PTB6
D29/PTB5
D28/PTB4
D27/PTB3
D26/PTB2
Vss
D25/PTB1
Vcc
D24/PTB0
D23/PTA7
D22/PTA6
D21/PTA5
D20/PTA4
Vss
D19/PTA3
Vcc
D18/PTA2
D17/PTA1
D16/PTA0
Vss
D15
Vcc
D14
D13
D12
D11
D10
D9
D8
D7
D6
Vss
D5
Vcc
D4
D3
D2
D1
D0
A0
A1
A2
A3
Vss
A4
Vcc
A5
A6
A7
A8
A9
A10
A11
A12
A13
Vss
A14
Vcc
A15
A16
A17
A18
A19
A20
A21
Vss
A22
Vcc
A23
Vss
A24
Vcc
A25
/BS/PTK4
/RD
/WE0/DQMLL
/WE1/DQMLU//WE
/WE2/DQMUL//ICRD/PTK6
/WE3/DQMUU//ICWR/PTK7
RD//WR
PTE7
Vss
/CS0
Vcc
/CS2/PTK0
/CS3/PTK1
/CS4/PTK2
/CS5//CE1A/PTK3
/CS6//CE1B
/CE2A/PTE4
/CE2B/PTE5
CKE/PTK5
/RAS3L/PTJ0
/RAS2L/PTJ1
/CASLL//CAS/PTJ2
Vss
/CASLH/PTJ3
Vcc
/CASHL/PTJ4
/CASHH/PTJ5
DACK0/PTD5
DACK1/PTD7
CAS2L/PTE6
CAS2H/PTE3
/RAS3U/PTE2
/RAS2U/PTE1
PTE0
/BACK
/BREQ
/WAIT
/RESETM
PTH5//ADTRG
IOIS16/PTG7
PTG6
PTG5
PTG4
PTG3
PTG2
VSS
PTG1
Vcc
PTG0
PTF7/PINT15
PTF6/PINT14
PTF5/PINT13
PTF4/PINT12
PTF3/PINT11
PTF2/PINT10
PTF1/PINT9
PTF0/PINT8
MD0
Vcc(PLL1)
CAP1
Vss(PLL1)
Vss(PLL2)
CAP2
VCC(PLL2)
PTH6
Vss
Vss
Vcc
XTAL1
EXTAL1
STATUS0/PTJ6
STATUS1/PTJ7
TCLK/PTH7
/IRQOUT
Vss
CKIO
Vcc
TXD0/SCPT0
SCK0/SCPT1
TXD1/SCPT2
SCK1/SCPT3
TXD2/SCPT4
SCK2/SCPT5
RTS2/SCPT6
RXD0/SCPT0
RXD1/SCPT2
Vss
RXD2/SCPT4
Vcc
CTS2//IRQ5/SCPT7
PTC7/PINT7
PTC6/PINT6
PTC5/PINT5
PTC4/PINT4
Vss
/WAKEUP/PTD3
Vcc
PTD2//RESETOUT
PTC3/PINT3
PTC2/PINT2
PTC1/PINT1
PTC0/PINT0
DRAK0/PTD1
DRAK1/PTD0
/DREQ0/PTD4
/DREQ1/PTD6
/RESETP
/CA
MD3
MD4
MD5
AVss
AN0/PTL0
AN1/PTL1
AN2/PTL2
AN3/PTL3
AN4/PTL4
AN5/PTL5
AVcc
AN6/DA1/PTL6
AN7/DA0/PTL7
AVss
I
I
-
O
I
-
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
O
O
O
O
-
O
-
O
O
O
O
O
O
O
O
O
-
O
-
O
O
O
O
O
O
O
-
O
-
O
-
O
-
O
I/O
O
O
O
I/O
I/O
O
I/O
-
O
-
I/O
I/O
I/O
I/O
O
I/O
I/O
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
I
I
I
I
-
I
-
I
I
I
I
I
I
I
I
I
I
-
-
-
-
-
-
I
-
-
-
O
I
I/O
I/O
I/O
O
-
I/O
-
O
I/O
O
I/O
O
I/O
I/O
I
I
-
I
-
I
I/O
I/O
I/O
I/O
-
I/O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
-
I
I
I
I
I
I
-
I/O
I/O
-
Mode control
Power 3.3V
Crystal oscillator
Ground
Non-maskable interrupt request
Interrupt request / Port H
Data bus / Port B
Ground
Data bus / Port B
Power 3.3V
Data bus / Port B
Data bus / Port A
Ground
Data bus / Port A
Power 3.3V
Data bus / Port A
Ground
Data bus
Power 3.3V
Data bus
Ground
Data bus
Power 3.3V
Data bus
Address bus
Ground
Address bus
Power 3.3V
Address bus
Ground
Address bus
Power 3.3V
Address bus
Ground
Address bus
Power 3.3V
Address bus
Ground
Address bus
Power 3.3V
Address bus
Bus cycle / Port K
Read strobe
Read / Write
Port E
Ground
Chip select
Power 3.3V
Chip select / Port K
Chip select / Chip enable / Port K
Chip select / Chip enable
Chip enable / Port E
CK enable / Port K
3L Row address strobe / Port J
2L Row address strobe / Port J
LL Column address strobe / Column address strobe / Port J
Ground
LH Column address strobe / Port J
Power 3.3V
HL Column address strobe / Port J
HH Column address strobe / Port J
DMA acknowledge / Port D
2L Column address strobe / Port E
2H Column address strobe / Port E
3U Row address strobe / Port E
2U Row address strobe / Port E
Port E
Bus acknowledge
Bus request
Hardware wait request
Manual reset
Port H / Analog trigger
Write protect / Port G
Port G
Ground
Port G
Power 3.3V
Port G
Port F / Port interruption
Mode control
Power 3.3V
Capacitor
Ground
Ground
Capacitor
Power 3.3V
Port H
Ground
Power 3.3V
Crystal oscillator
Processor status / Port J
Timer clock / Port H
Interrupt request output
Ground
System clock input / output
Power 3.3V
Data transmission / SCI port
Serial clock / SCI port
Data transmission / SCI port
Serial clock / SCI port
Data transmission / SCI port
Serial clock / SCI port
Transmit request / SCI port
Data reception / SCI port
Ground
Data reception / SCI port
Power 3.3V
Transmit request / Interrupt request / SCI port
Port C / Port interruption
Ground
Standby mode Interrupt request output / port D
Power 3.3V
Port D / Reset output
Port C / Port interruption
DMA acknowledge / Port D
DMA request / Port D
Power on reset
Chip active
Mode control
Analog ground
Analog input / Port L
Analog power 3.3V
Analog input / Analog output / Port L
Analog ground
HD6417709F80B (XV250B00) CPU
LSI PIN DESCRIPTION
Summary of Contents for RS7000 Ver.1.2
Page 6: ...RS7000 6 ...
Page 7: ...RS7000 7 ...
Page 38: ...RS7000 38 B B DM Circuit Board 2NA V615480 2 4 ...
Page 39: ...RS7000 39 B B Pattern side 2NA V615480 2 4 ...
Page 42: ...RS7000 42 D D PNSW Circuit Board 2NA V615500 2 1 ...
Page 43: ...RS7000 43 D D Pattern side 2NA V615500 2 1 ...
Page 45: ...RS7000 45 Pattern side 2NA V615490 2 1 ...
Page 56: ...RS7000 56 ...
Page 57: ...RS7000 57 ...
Page 58: ...RS7000 58 ...
Page 59: ...RS7000 59 ...
Page 60: ...RS7000 60 ...
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