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MCX-1000
69
SCHEMATIC DIAGRAM (MAIN: Sub CPU Block)
1
2
3
4
5
6
7
8
9
★
All voltages are measured with a 10M
Ω
/V DC electronic voltmeter.
★
Components having special characteristics are marked
s
and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
Point 6 Pin 40 of IC602
Point 7 Pin 37 of IC602
Point 8 Emitter of Q603 and pin 36 of IC602
A
B
POWER ON
(Connect the power cable)
POWER OFF
(Disconnect the power cable)
IC601: NJM7805FA
Voltage Regulator
INPUT
OUTPUT
COMMON
16-bit timer/
event counter
8-bit timer/
event counter 50
8-bit timer/
event counter 51
Serial
Interface 30
Serial
Interface 31
UART0
A/D converter
Interrupt control
Buzzer output
Clock output
control
PCL/P74
BUZ/P75
ASCK0/P25
TxD0/P24
RxD0/P23
SI31/P34
SCK31/P36
SO31/P35
SI30/P20
TI51/TO51/P73
TI00/TO0/P70
TI50/TO50/P72
TI01/P71
SCK30/P22
SO30/P21
AVREF
AVss
AVDD
INTP0/P00 to
INTP3/P03
ANI0/P10 to
ANI7/P17
Watchdog timer
Watch timer
78K/0
CPU
core
RAM
(1,024
bytes)
Flash
memory
(32 KB)
VDD0 VDD1 VSS0 VSS1 VPP
System control
External access
Port 7
Port 6
Port 5
Port 4
Port 3
Port 2
Port 1
Port 0
P00 to P03
P10 to P17
P20 to P25
P30 to P36
P40 to P47
P50 to P57
P64 to P67
P70 to P75
RD/P64
WR/P65
WAIT/P66
ASTB/P67
RESET
X1
XT1
XT2
X2
AD0/P40 to
AD7/P47
A8/P50 to
A15/P57
IC602:
µ
PD78F0034BGB-8EU
8-bit Microcomputer
IC603 : M62703ML
System Reset
+
–
1
VCC
3 OUTPUT
2
GND
R
R
1.25V
IC604: PQ3RD13
Voltage Regulator
1
Vin
2
Vo
4
Vc
3
GND
VCC
GND
WP
SCL
SDA
A2
A1
A0
DIN
R/W
LOAD
LOAD
INC
EN
COMP
DOUT
START
STOP
LOGIC
DEVICE
ADDRESS
COMPARATOR
SERIAL
CONTROL
LOGIC
DATA WORD
ADDR/COUNTER
Y DEC
H.V. PUMP/TIMING
DATA RECOVERY
EEPROM
SERIAL MUX
DOUT/ACK
LOGIC
X DEC
IC605: AT24C04N-10SI-2.7
EEPROM
A2
13
B2
12
O2
11
A3
10
B3
9
O3
8
B0
2
O0
3
A1
4
B1
5
O1
6
GND
7
IC606, 613: 74VHC00MTCX
Quad 2-Input NAND Gate
Vcc
14
A0
1
IC608 : PST600JM
System Reset
+
–
3 VOUT
2 GND
1 VCC
+
–
4B
13
4A
12
4Y
11
3B
10
3A
9
3Y
8
1B
2
1Y
3
2A
4
2B
5
2Y
6
GND
7
IC609: SN74LV08APWR
Quad 2-Input AND Gate
Vcc
14
1A
1
IC610: SN74AHCT1G125DCKR
Single Bus Buffer Gate
1
2
3
OE
A
GND
4
5 VCC
Y
IC611, 612: SN74LVC1G17DCKR
Single Schmitt-Trigger Buffer
1
2
3
NC
A
GND
4
5 VCC
Y
IC614: SN74LV132APWR
Quad 3-Input Positive NAND Gates
1A
1B
1Y
2A
2B
2Y
GND
Vcc
4B
4A
4Y
3B
3A
3Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IC615: SN74CBT3306PWR
FET Bus Switch
1
2
3
4
5
6
7
8
1OE
1A
1B
GND
Vcc
2OE
2B
2A
IC616: SN74LVC2G17DCKR
Schmitt-Trigger Buffer
1
2
5
3
1A
GND
2A
4
6 1Y
VCC
2Y
0
0
2.1
0
1.7
0
0
0
0.7
0.7
13.0
5.7
5.7
5.9
0.1
0.1
0
4.9
4.9
4.8
0
0
6.4
6.4
7.0
12.2
12.9
13.0
3.3
3.3
0
3
2
0.1
0.1
0.1
4.9
0
7
10
12
3.3
3.3
3.3
3.3
0
0
0.1
2.1
2.1
3.3
3.3
5.2
5.2
0
0
5.0
0
0
0
0
0
4.9
0.8
0
0
0
0
0
4.9
4.9
4.3
22.3
0.1
0.1
0.7
0
0
0
0
0
0
0
0.1
0
0
2.5
4.9
0
0
0
0
0
0
0
0
0.1
4.9
4.4
4.2
4.9
4.9
4.9
4.9
4.9
4.9
4.9
4.9
4.9
4.9
4.3
0
0
0
0
0
4.9
5.0
4.9
4.8
0
0
2.5
2.4
2.8
4.9
4.9
4.9
4.9
2.9
4.9
4.9
4.9
4.9
1.8
1.9
4.9
4.9
0
0
0
0
0
0
0
0
5.0
6
7
8
B
8
A
2.5
2.4
2.5
2.4
2.4
4.7
0
4.9
4.9
0.1
4.8
4.7
4.9
0.2
0
4.9
4.9
3.3
3.3
0
0
4.9
0
0
0
0
4.9
4.9
4.9
4.9
0
4.9
4.9
4.9
0
4.9
4.9
4.9
4.8
4.9
4.4
4.9
0
4.9
4.9
4.9
4.9
0
0
4.9
4.9
4.9
0
4.9
4.9
0
0
4.9
4.9
0
0
4.9
0
4.9
0
0
0
4.9
0
4.9
0
3.3
0
0
4.9
0
3.3
0
3.3
3.3
0
4.8
0
4.9
0
POWER SUPPLY
VOLTAGE
REGULATOR
VOLTAGE
REGULATOR
SYSTEM
RESET
SUB CPU
EEP ROM
GREEN
PO
WER_LED
RED
ST
ANDBY_LED
IC606
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IC607
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IC609
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IC613
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IC614
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IC610
1
2
3
5
4
IC611
1
2
3
5
4
IC612
1
2
3
5
4
P
age 71
to OPERA
TION (4)
I2
P
age 72
to OPERA
TION (1)
L5
P
age 73
to OPERA
TION (5)
K1
P
age 73
to OPERA
TION (5)
K3
&1
&1
IC605
AT24C04N-10SI-2.7
24LC04BT-1/SN
Mark
Reference Parts Number
Parts Name