Yamaha DVX-S120, Service Manual

Page: 75 / 98

A B C D E F G H
1
2
3
4
5
6
I J K
7
8
DVR-S120/NX-P120
75
■
DVR-S120 SCHEMATIC DIAGRAM (DIGITAL)
VIDEO_L
(ANALOG IN)
VIDEO_L
(ANALOG IN)
FRONT_L
CENTER
REAR_L
ANALOG IN
(DIGITAL)
ANALOG IN
(DIGITAL)
FRONT_L
CENTER
REAR_L
FR
ONT_L
REAR_L
CENTER
CODEC
DSP
4M DRAM
PLD
256K SRAM
DECODER
MAIN CPU
SUB CPU
5.0
0.9
0.2
0.7
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
5.0
1.0
1.1
1.1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5.0
0
0
0
0
0
0
0
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
0
0
0
0
0
0
0
0
0
0
0
3.3
0
2.6
2.6
3.3
3.3
3.3
0
0
0
0
0
0
0 0 0 0 0 0 0 0
0
3.3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3.3
2.7 2.7 2.7 2.7
2.7 2.7 2.7 2.7
5.0
2.5
3.3
2.5
4.8
0
5.0
3.3
0
0
0
0
1.7
1.7
1.2
1.2
1.5
1.9
0
0
1.2
5.0 5.0 4.0
3.3
2.5 2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5 2.5
2.5
0
0
0
11.7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4.8
4.8
0
0
0
11.7
-12.2
0
0
0
0
0
0
11.7
-12.2
0
0
0
0
0
0
11.7
-12.2
-12.2
-12.2
0
0
11.7
0
5.0
5.0
2.5
5.0 5.0 5.0 5.0 1.6
0
0
0
0
0 0 0
1.7
1.6
1.6
0 0
0
3.3 2.5 2.5 2.0 1.2 2.5
2.6
2.5
2.5
2.5 0
2.6
1.7
1.7
1.6
2.5
3.3
3.3
3.3
3.3
3.3
3.3 3.3
3.3
3.3
3.3
3.3
3.3 0 0
0 0
1.2
2.7 2.7 2.7
2.7
2.7 2.7 2.7
2.7
3.3
4.8 1.9 3.3 3.3
3.3
4.8
4.8
4.8
4.8
2.5
1.6
3.3
3.3 3.3
3.3
3.3
3.3 3.3 3.3
1.9 1.8
0
0 0 0 0 0 0 0 0 0
0 0
0 0
0 0
0
0
0
0
0
0
0
0
0
0
2.5
0.7
0.7
0.1
5.0
5.0
5.0 5.0
5.0
2.4
5.0
5.0
0
0
0
0 0
3.4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4.8
4.8
4.8
4.8
4.9
4.9
0.1
0.1
0 0 0
4.8 4.8 5.0 4.8 4.8 4.8 4.8 4.8 4.8
4.8 4.8
0.1 0 0 0 0 0
0
0
0
0
0
0
0
0
0
0
0
0.1
4.8
4.8
4.8
4.8
4.9
4.9
4.9
5.0
4.6
0
0
0
0
0
0 0 0
0
0
0 0 0
0
0.1 5.0
5.0
5.0
5.0 5.0
5.0
1.7 2.4 4.8
4.8
5.1
5.0
2.5
4.9
4.9
5.0
2.3
2.1
0.3
0.3
2.5
4.8 5.0
5.0
5.0 5.0
5.0
5.0
0.1
0 0 0 0
0
0 0 0 0 0 0 0 0
0
0 0 0 0 0 0
0 0
0
0.1 0.1 4.9
0.1 0.1 2.2 3.1 3.3 1.1 1.7 ~ ~ ~ ~ 1.7 ~ 2.0 1.8 0.1 0.1 0.1 0.1 0.1 0.1 1.1 1.1 1.1 0 0 0 0 3.3
0.2
1.2
1.2
1.2
3.3
3.3
1.5
1.7
1.7
1.6
2.5
1.2 4.8
4.9
3.3
0.3
0.3
4.8
4.9
3.3
2.5
0
0
~
~
~
~
2.0
2.2
2.2
3.1
1.8
1.1
1.7
5.0
2
1
3
7
2
1
14
6
5 4
13
11
12
12
8
9
8
1
7
6
5 4
3
2
1
8
6
5
3
2
1
8
7
4
6
5
3
2
1
8
7
4
6
5
3
2
1
8
7
4
6
5
7
4
2
3
Page 76 J2
to MAIN (2)
X : NOT USED
EUROPE
Page 77 D1
to MAIN (1) Page 78 F1
to FL
Point
q
(Pin 13 of IC381)
Point
w
(Pin 2 of IC379)
IC374 : TC74HCT08AF
Quad 2 Input AND
A1
B1
A2
V
DD
B4
1
2
3
4 11
Y1 A4
Y4
12
13
14
B2
Y2
B3
A3
5
6
7 V
SS
Y3 8
9
10
IC375–377, 384, 385 :
µ
PC4570G2
Dual OP-Amp
– +
OUT
1
–IN
1
–V
CC
+V
CC
OUT
2
1
2
3
4 5
+IN
1
–IN
2
+IN
2
– +
6
7
8
* All voltages are measured with a 10M
Ω
/V DC
electronic volt meter.
* Components having special characteristics are
marked
Z
and must be replaced with parts
having specifications equal to those originally
installed.
* Schematic diagram is subject to change without
notice.
IC373 : CS493292-CLR
Audio Decoder
Compressed
Data Input
Interface
17
37
38
32
44
43
42
39
40
41
3
33 34 35 24 13 2 23 12 1
16 15 14 11 10 9 8 36
27
28
29
Digital
Audio
Input
Interface
RAM Input
Buffer
RAM Output
Buffer
24-Bit
DSP Processing
Output
Formatter
STC
RAM
Program
Memory
RAM
Data
Memory
RAM
Program
Memory
RAM
Data
Memory
Frame
Shifter
Input
Buffer
Controller
Parallel or Serial Host Interface
25
26
PLL
Clock Manager
30
31
22
18 5 4 19 7 6 20 21
A0, SCCLK
DATA7, EMAD7, GPIO7
DATA6, EMAD6, GPIO6
DATA5, EMAD5, GPIO5
DATA4, EMAD4, GPIO4
VD2
DGND2
DATA3, EMAD3, GPIO3
DATA2, EMAD2, GPIO2
DATA1, EMAD1, GPIO1
DATA0, EMAD0, GPIO0
A1, SCDIN RD
, R/W
, EMOE, GPIO10
WR, DS
, EMWR, GPIO10
A
U
D
AT
A3, XMT958
DGND1 VD1 MCLK SCLK LRCLK A
U
D
ATA
0
A
U
D
ATA
1
AUDATA2
DC
DD
RESET
AGND
VA
FILT1
FILT2
CLKSEL
CLKIN
CMPREQ, LRCLKN2
7
8
9
10
11
12
13
14
16
15
17
18 19 20 21 22 23 24 25 26 27 28
40 41 42 43 44
1 2 3 4 5 6
29
30
31
32
33
34
35
36
37
38
39
CS
SCDIO
, SCDOUT
, PSEL, GPIO9
ABOO
T,
INTREQ
EXTMEM, GPIO8
SD
AT
AN1 VD3
DGND3
SCLKN1, STCCLK2
LRCLKN1
CMPD
AT
, SD
AT
AN2, RCV958
CMPCLK, SCLKN2
1 VCC
2 DQ1
3
DQ2
4 DQ3
5
DQ4
6 VCC
7 DQ5
8
DQ6
9 DQ7
10
DQ8
11 NC
12 NC
13
WE
14 RAS
15
NC
16 A0
17 A1
18
A2
19 A3
20
VCC
40 VSS
39 DQ16
38
DQ15
37 DQ14
36
DQ13
35 VSS
34 DQ12
33
DQ11
32 DQ10
31
DQ9
30 NC
29 LCAS
28
UCAS
27 OE
26
A8
25 A7
24 A6
23
A5
22 A4
21
VSS
TIMING
GENERATOR
I/O
CONTROLLER
I/O
CONTROLLER
COLUMN
DECODERS
SENSE
AMPLIFIERS
I/O
SELECTOR
OUTPUT
BUFFERS
OUTPUT
BUFFERS
INPUT
BUFFERS
INPUT
BUFFERS
MEMORY
CELLS
COLUMN
ADDRESS
BUFFERS
INTERNAL
ADDRESS
COUNTER
REFRESH
CONTROL CLOCK
ROW
DECODERS
WORD
DRIVERS
ON CHIP
VBB GENERATOR
ROW
ADDRESS
BUFFERS
RAS
LCAS
UCAS
A0~A8
VCC
VSS
WE OE
DQ1~DQ8
DQ9~DQ16
9 9
16 16
8
8
8
8
8
8
8
8
9 9
IC378 : MSM514260E-60JS
4Mbit DRAM
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
A4
A3
A2
A1
OE
A0
CE
I/O7
I/O6
I/O5
I/O4
I/O3
INPUT BUFFER
COLUMN
DECODER
POWER
DOWN
SENSE AMPS R
O
W DECODER
512 X 512
ARRAY
CE
A10
A9
A8
A7
A6
A5
A4
A3
A2
A14 A13 A12 A11
A1 A0
WE
OE
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
IC371 : CY62256LL-70SNCT
Static RAM
1
2
3
4
5
6
7
8
9
10
11
SDOS
I2C
SMUTE
BICK
LRCK
SDTI1
SDTI2
SDTI3
SDTO
D AUX
DFS
12 13 14 15 16 17 18 19 20 21 22
SDTI4
DZFE TVDD
DVDD
DVSS
PDN
TST1
CAD1 CAD0
LOUT4
ROUT4
33
32
31
30
29
28
27
26
25
24
23
DZF2/OVF
RIN
LIN
NC
TST2
ROUT1
LOUT1
ROUT2
LOUT2
ROUT3
LOUT3
44 43 42 41 40 39 38 37 36 35 34
TDM0 LOOP0/SDA/CDTI DIF1/SCL/CCLK DIF0/CSN P/S MCLK DZF1 AVSS AVDD VREFH VCOM
DATT L P F DAC L OUT1
H P F A D C L IN
MCLK
LRCK
BICK
DAUX
SDOS
SDTO
SDTI1
SDTI2
SDTI3
SDTI4
FORMAT
CONVERTER
H P F A D C R IN
DATT L P F DAC
R OUT1
DATT L P F DAC L OUT2
DATT L P F DAC R OUT2
DATT L P F DAC
L OUT4
DATT L P F DAC
DATT L P F DAC L OUT3
DATT L P F DAC
R OUT4
R OUT3
A U D I O
I / F
MCLK
LRCK
BICK
SDOUT
SDIN1
SDIN2
SDIN3
SDIN4
IC380 : AK4628VQ
192kHz 24bit 8ch CODEC
w w w . x i a o y u 1 6 3 . c o m
Q Q
3 7 6 3 1 5 1 5 0 9 9
2
8 9
4 2
9 8
T E L 1 3 9 4 2 2 9 6 5 1 3 9 9 2 8 9 4 2 9 8 0 5 1 5 1 3 6 7 3
Q Q
TEL 13942296513 QQ 376315150 892498299 TEL 13942296513 QQ 376315150 892498299
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