A
B
C
D
E
F
G
H
1
2
3
4
5
6
I
J
K
L
M
N
7
8
9
10
71
DVX-1000
IC1
IC2
IC4
IC6
IC9
IC8
IC13
IC10
IC14
IC15
IC16
IC12
IC11
IC5
IC7
IC3
DECODER
DSP
DIR
MICRO-
PROCESSOR
CODEC
4M FLASH ROM
16M SDRAM
REGULATOR
REGULATOR
BUFFER
BUFFER
RESET
DVR IN
D_F
FL
SW
D_SW
5.0
2.5
5.0
5.0
2.1
0
0
2.1
3.3
3.3
0.6
3.3
0
1.7
1.3
1.3
1.3
1.7
1.7
1.3
1.3
1.3
3.3
3.2
3.0
3.3
3.3
3.3
3.3
3.3
3.3
1.3
1.3
1.3
1.3
1.3
1.3
3.3
3.3
1.3
1.3
1.3
1.3
1.3
1.3
1.3
1.3
1.7
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3.3
1.7
0
3.3
1.7
1.3
0
3.3
0
0
5.0
5.0
5.0
5.0
0.1
0
0
0
0
0
0
0
3.3
5.0
5.0
4.8
3.3
3.3
3.3
0.1
0
3.3
5.0
3.3
3.3
3.0
5.0
5.0
5.0
5.0
3.2
3.2
0
0
0
0
0
0
5.0
5.0
0
0
0
0
0
0
0
0
0
0
0
5.0
0
0
0
0
0
0
0
1.7
1.7
1.3
1.3
2.5
2.5
0
0
0
0
0
0
0
0
2.9
3.3
1.3
2.7
0
0
0
0
0
0
2.5
2.5
1.0
2.4
2.6
2.6
2.5
5.0
5.0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5.0
5.0
5.0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
5.0
5.0
5.0
0
0
0
0
4.9
4.9
4.9
1.7
5.0
0
0
0
0
0.7
0.1
3.3
5.0
5.0
2.5
12.0
12.0
4.5
4.5
3.3
4.5
2.9
1.3
5.0
0
5.0
12.2
5.0
3.6
0
2.1
0
0
0
-11.6
5.0
5.0
5.0
2.5
2.5
2.5
0
0
2.5
2.5
0
0
0
0
0
0
0
0
5.0
2.9
2.5
2.4
4.8
5.0
5.0
4.9
4.9
5.0
5.0 5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
4.8
5.0
4.1
4.1
4.1
4.1
5.0
5.0
5.0
5.0
5.0
0
0
0
5.0
0
0
0
0
0
3.3
3.3
3.3
3.3
0
0
0
0
0
0
0
0
0
0
0
1.7
1.7
1.7
3.3
3.3
3.3
3.3
3.3
1.3
1.3
3.3
3.0
3.2
3.3
3.3
3.3
3.3
3.2
0.2
1
.8
1.8
1.2
1.2
0.1
0.2
1.9
3.0
3.2
3.3
3.3
3.3
3.3
3.3
3.3
2.3
2.3
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
3.2
1.8
1.1
1.2
1.9
0.2
3.3
3.3
3.3
3.3
3.3
3.2
3.2
3.2
3.2
3.2
3.2
3.3
3.3
3.3
3.2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1.8
1.3
1.3
1.3
1.3
1.1
1.2
0.2
1.2
1.7
1.8
1.8
1.9
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.0
3.2
3.4
0.2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3.3
3.3
3.2
3.2
3.2
2.3
3.2
3.2
3.2
3.2
3.2
3.3
3.2
3.2
3.2
3.2
1.3
1.3
1.3
0.2
1.7
1.3
1.3
3.3
1.3
0.7
3.3
1.5
0
1.6
1.7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3.3
0
0
5.0
5.0
0
0
2.4
3
CH1
3
CH2
1
2
to DSP (2)_CB203
to DSP (3)_CB304
to MAIN (1)_CB2
to MAIN (2)_CB3
to MAIN (2)_CB4
to DSP (2)_CB201
to DSP (2)_CB202
DSP (1)
1/2
No replacement part available.
サービス部品供給なし
Page 72 E9
Page 72 I7
Page 73 A2
Page 74 A3
Page 74 A5
Page 72 E7
Page 72 E8
■
SCHEMATIC DIAGRAMS
DSP 1/2
* All voltages are measured with a 10M
Ω
/V DC electronic volt meter.
* Components having special characteristics are marked
Z
and
must be replaced with parts having specifications equal to
those originally installed.
* Schematic diagram is subject to change without notice.
IC8: SN74LV245APWR
Octal 3-state bus transceivers
1
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
GND
20 V
CC
18 B1
17 B2
16 B3
15 B4
14 B5
13 B6
12 B7
11 B8
19 ENG
IC11: PQ012FZ01ZPH
Rgulator
DC INPUT (VIN)
DC OUTPUT (VO)
ON/OFF CONTROL (VC)
GND
2
5
3
1
I C
A1
B1
A2
V
DD
B4
1
2
3
4
11
Y1
A4
Y4
12
13
14
B2
Y2
B3
A3
5
6
7
V
SS
Y3
8
9
10
IC6, 9: SN74AHCT08PWR
Quad 2 input AND
* 電圧は、内部抵抗10MΩの電圧計で測定したものです。
*
Z
印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
* 本回路図は、標準回路図です。改良のため予告なく変更することがございます。
IC7: S29AL004D70TFI020
4M bit flash memory
IC5: W9816G6CH-7
512K x 2 banks x 16 bits SDRAM
CLOCK
BUFFER
ADDRESS
BUFFER
CLK 35
18
CKE 34
A10 20
CS
17
RAS
16
CAS
15
WE
21
A0
24
A3
27
A4
32
A9
19
BA
2
DQ0
3
DQ1
5
DQ2
6
DQ3
8
DQ4
9
DQ5
11 DQ6
12 DQ7
39 DQ8
40 DQ9
42 DQ10
43 DQ11
45 DQ12
46 DQ13
48 DQ14
49 DQ15
14 LDQM
36 UDQM
COMMAND
DECODER
REFRESH
COUNTER
REFRESH
COUNTER
DQ
BUFFER
COLUMN
COUNTER
MODE
REGISTER
CONTROL
SIGNAL
GENERATOR
CELL ARRAY
BANK #0
R
O
W
D
E
C
O
D
E
R
COLUMN DECODER
SENSE AMPLIFIER
CELL ARRAY
BANK #1
R
O
W
D
E
C
O
D
E
R
COLUMN DECODER
SENSE AMPLIFIER
NX-SW1000
IC13: M30626FHPFP
Single-chip 16-bit CMOS microprocessor
IC14, 15: NJM4580E
Dual operational amplifier
–
+
OUT
1
–IN
1
–V
CC
+V
CC
OUT
2
1
2
3
4
5
+IN
1
–IN
2
+IN
2
–
+
6
7
8
IC3: SN74AHC1G08DCKR
Single 2 input AND
1
2
3
5
4
VDD
OUT X
IN B
VSS
IN A
1A
1Y
2Y
V
DD
6A
1
2
3
4
11
2A
6Y
5A
12
13
14
3A
3Y
5Y
4A
5
6
7
V
SS
4Y
8
9
10
IC2: MM74HCU04SJX
Hex inverters
RY/BY
ERASE VOLTAGE
GENERATOR
SECTOR
SWITCHES
TIMER
VCC DETECTOR
VCC
VSS
WE
BYTE
CE
OE
A0–A17
RESET
STATE
CONTROL
COMMAND
REGISTER
CHIP ENABLE
OUTPUT ENABLE
LOGIC
PGM VOLTAGE
GENERATOR
I/O BUFFERS
DQ0–DQ15 (A-1)
DATA LATCH
Y-DECODER
X-DECODER
ADDRESS LA
TCH
STB
STB
Y-GATING
CELL MATRIX
Point
e
CH 1 : Out of IC16
CH 2 : Collector of Q1
↑
SYSTEM POWER SW ON
↑
SYSTEM POWER SW OFF
Point
w
Pin 13 of IC13
Point
q
Pin 29 of IC4
Output (timer A): 5
Input (timer B): 6
Internal peripheral functions
Watchdog timer
(15-bit)
DMAC
(2-channel)
D/A converter
(8-bit x 2-channel)
Memory
ROM
(1)
RAM
(2)
A/D converter
(10-bit
X
8-channel
Expandable up to 26-channel)
UART or
clock synchronous serial I/O
(8-bit
X
3-channel)
System clock
generation circuit
XIN-XOUT
XCIN-XCOUT
PLL frequency synthesizer
On-chip oscillator
M16C/60 series16-bit
microprocessor
core
Port P0
8
Port P1
8
Port P2
8
8
8
8
Port P6
8
8
R0L
R0H
R1H
R1L
R2
R3
A0
A1
FB
SB
ISP
USP
INTB
CRC arithmetic circuit (CCITT)
(Polynomial : X
16
+X
12
+X
5
+1)
Multiplier
7
8
8
Po
rt P10
Po
rt
P
9
Po
rt P8_5
Po
rt
P
8
Po
rt
P
7
NOTES :
1. ROM size depends on microprocessor type.
3. Ports P11 to P14 exist only in 128-pin version.
4. Use M16C/62PT on VCC1= VCC2.
Port P5
Port P4
Port P3
Clock synchronous serial I/O
(8-bit
X
2-channel)
PC
FLG
Timer (16-bit)
Three-phase motor
control circuit
8
8
8
2
Port P11
Port P12
Port P14
Port P13
(3)
<VCC2 ports>
(4)
<VCC1 ports>
(4)
<VCC1 por
ts>
(4)
<VCC2 ports>
(4)
<VCC1 ports>
(4)
(3)
(3)
(3)
IC4: LC89057W-VF4AD-E
Digital audio interface transceiver
Input
Selector
RXOUT
RX0
RX1
RX2
RX3
RX4
RX5/VI
RX6/UI
LPF
TMCK/PIO0
TBCK/PIO1
TLRCK/PIO2
TDATA/PIO3
TXO/PIOEN
Cbit, Ubit
Microcontroller
I/F
Data
Selector
Clock
Selector
Modulation
&
Parallel Port
PLL
XIN
XOUT XMCK CKST
SLRCK
SBCK
RLRCK
RBCK
RMCK
SDIN
RDATA
RERR
DO
XMODE
CI
CE
CL
INT
AUDIO/VO
EMPHA/UO
1/N
Demodulation
&
Lock detect
1
2
3
4
5
8
9
10
13
44
45
46
47
48
29
28
27
34
23
22
20
17
16
24
21
36
37
41
38
39
40
35
33
32
IC10: AK4628VQ
192 kHz 24-bit 8-channel CODEC
MCLK
LRCK
BICK
Format
Converter
SDOS
SDOUT
SDIN1
SDIN2
SDIN3
SDIN4
ADC
HPF
Audio
I/F
ADC
HPF
DAC
DATT
LPF
DAC
DATT
LPF
DAC
DATT
LPF
DAC
DATT
LPF
DAC
DATT
LPF
DAC
DATT
LPF
DAC
DATT
LPF
DAC
DATT
LPF
AK4628A
22
ROUT4
12
1
SDTI4
8
SDTI3
7
SDTI2
6
SDTI1
9
SDTO
10
DAUX
4
BICK
5
LRCK
39
MCLK
32
RIN
31
LIN
21
LOUT4
24
ROUT3
23
LOUT3
26
ROUT2
25
LOUT2
28
ROUT1
27
LOUT1
Pin Multiple
EMIF32
L1P Cache
Direct Mapped
4K Bytes Total
Digital Signal Processors
L1D Cache
2-Way Set
Associative
4K Bytes Total
Clock Generator,
Oscillator and PLL
x4 through x25 Multipliers
/1 through /32 Dividers
Power-Down
Logic
Instruction Fetch
Instruction Dispatch
Instruction Decode
Data Path B
Data Path A
B Register File
Control
Registers
C67x
TM
CPU
Control
Logic
In-Circuit
Emulation
Interrupt
Control
Test
A Register File
.L1t
McASP1
McASP0
McBSP1
McBSP0
I2C1
I2C0
Timer 1
Timer 0
.S1t .M1t .D1
.D2 .M2t .S2t .L2t
GP1
GP0
HPI16
Enhanced
DMA
Controller
(16 channel)
L2 Cache/
Memory
4 Banks
64K Bytes
Total
(4-Way)
L2
Memory
DA610:
192K Bytes
DA601:
64K Bytes
R2 ROM
512K
Bytes
Total
IC1: D60YA003BPYP225
Decoder
Summary of Contents for DVX -1000
Page 6: ...6 DVX 1000 DVX 1000 Front view Side view Front view Side view NX SW1000 NX P1000 ...
Page 8: ...8 DVX 1000 DVX 1000 F model J model Rear view Bottom view Rear view Bottom view DVR 1000 ...
Page 9: ...9 DVX 1000 DPX 1200 DVX 1000 R model A model K model G F models NX SW1000 ...
Page 10: ...10 DVX 1000 DVX 1000 L model J model Red Black NX SW1000 NX P1000 Rear view Bottom view ...