Yamaha DSP-AX2700, Service Manual

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RX-V2700/DSP-AX2700
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RX-V2700/
DSP-AX2700
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EM_D[14]
Core Supply (CVpp)
EM_D[13]
EM_D[12]
IO Supply (DVpp)
EM_D[11]
Ground(Vss)
EM_D[10]
EM_D[9]
Core Supply (CVpp)
EM_D[8]
EM_WE_DQM[1]
IO Supply (DVpp)
Ground(Vss)
EM_CLK
EM_CKE
Ground(Vss)
IO Supply (DVpp)
EM_A[11]
EM_A[9]
EM_A[8]
Core Supply (CVpp)
Ground(Vss)
EM_A[7]
EM_A[6]
IO Supply (DVpp)
Ground(Vss)
EM_A[5]
EM_A[4]
Core Supply (CVpp)
EM_A[3]
Ground(Vss)
EM_A[2]
EM_A[1]
Core Supply (CVpp)
EM_A[0]
IO Supply (DVpp)
EM_A[10]
EM_BA[1]
Ground(Vss)
EM_BA[0]
EM_CS[0]
EM_RAS
Ground(Vss)
EM_CS[2]
Core Supply (CVpp)
EM_RW
IO Supply (DVpp)
EM_OE
SPI0_ENA/I2C1_SDA
Ground(Vss)
SPI0_ENA/I2C1_SCL
SPI0_CLK/I2C0_SCL
Ground(Vss)
SPI0_SIMO
IO
IO
IO
IO
IO
IO
IO
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
IO
IO
IO
IO
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
N
Y
Y
Y
Y
EMIF data bus [lower 16-Bits]
EMIF data bus [lower 16-Bits]
EMIF data bus [lower 16-Bits]
EMIF data bus [lower 16-Bits]
EMIF data bus [lower 16-Bits]
EMIF data bus [lower 16-Bits]
EMIF data bus [lower 16-bits]
Write enable or byte enable for EM_D [15:8]
SDRAM clock
SDRAM clock enable
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
EMIF address bus
SDRAM bank address and asynchronous memory Low-Order address
SDRAM bank address and asynchronous memory Low-Order address
SDRAM chip select
SDRAM row address strobe
Asynchronous memory chip Select
Asynchronous memory read/not write
SDRAM output enable
SPI0 enable (ready) or I2c1 serial data
SPI0 enable (ready) or I2c1 serial clock
SPI0 serial clock or I2c0 serial clock
SPI0 data pin slave in master out
PIN NO. SIGNAL NAME TYPE (1) PULL (2) GPIO (3) DESCRIPTION