DG100-212
11
OBIT 1
OBIT 2
H
22 bit
H
L
20 bit
H
H
18 bit
L
L
no output
L
IBIT 1
IBIT 2
IBIT 3
H
22 bit
H
H
L
20 bit
H
H
H
18 bit
L
H
L
16 bit
L
H
H
AV DSP
H
L
H
MEL
H
L
PIN
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
I/O
I
I
I
I
O
I
I
I
I/O
I/O
AGND
APD
AINL+
AINL-
ACAL
LGND
VL+
NC
DACL
DPD
CMODE
SMODE
L//R
SCLK
NAME
Analog ground
Analog signal input (L channel -)
Analog signal input (L c)
Analog calibration
Analog logic ground
Analog logic power supply
Digital calibration
Digital power down
Master clock select
(L: CLK=256fs, H:CLK=384fs)
Interface clock select
(L: slave mode, H: master mode)
Input channel select
Serial data clock
FUNCTION
PIN
NO.
15
16
17
18
19
20
21
22
23
24
25
26
27
28
I/O
O
I/O
I
O
I
I
I
O
O
SDATA
FSYNC
VD+
DGND
CLK
OCLK
NC
ICLK
VA+
VA-
AINR-
AINR+
VREF-
VREF+
NAME
Serial data output
Frame synch. clock
Digital power supply (+)
Digital ground
Master clock
128 fs clock output
128 fs clock input
Analog power supply (+)
Analog power supply (-)
Analog signal input (R channel -)
Analog signal input (R c)
Reference voltage (-)
Reference voltage (+)
FUNCTION
AK5390-VP (XQ199A00) ADC (Analog.Digita Converter)
PIN
NO.
1
2
3
4
5
6
7
8
I/O
I
I
I
I
DATA
CLOCK
+Vdd
DGND
-Vdd
LE
NC
NC
NAME
Serial data input
Bit clock
Digital power supply (+5V)
Digital ground
Digital power supply (-5V)
Latch enable
Reserved
Reserved
FUNCTION
PIN
NO.
9
10
11
12
13
14
15
16
I/O
I/O
O
I/O
I/O
+Vcc
BPO DC
I OUT
AGND
AGND
SERVO DC
REF DC
-Vcc
NAME
Analog power supply (+5V)
BPO decouple
Current output
Analog ground
Analog ground
Servo decouple
Ref. decouple
Analog power supply (-5V)
FUNCTION
PCM1702P (XN136A00) DAC (Digital to Analog Converter)
PIN
NO.
1
2
3
4
5
6
7
8
9
10
11
12
I/O
O
I
I
I
I
I
I
I
-
I
XO
XI
VSS2
BCI
SDSY
IBIT1
IBIT2
IBIT3
MUTE
NC
SDI
VDD2
NAME
System clock
Ground
Bit clock
L/R select and input timing
Input bit selection
Mute
No connection
Input data
Power supply
FUNCTION
PIN
NO.
13
14
15
16
17
18
19
20
21
22
23
24
I/O
I
I
-
I
O
O
O
O
-
O
OBIT1
OBIT2
NC
ASY
VSS1
BCO
WCO
SHL
DRO
NC
DLO
VDD1
NAME
Output bit selection
No connection
Synchronous/Asynchronous system clock
section
Ground
Bit clock of DLO, DRO
Word clock of DLO, DRO
Deglich signal of L/R channel
Output data of R channel
No connection
Output data of L channel
Power supply
FUNCTION
YSF210-M (XK280A00) Digital Filter
