D24
30
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
DAUX
HDLT
DOUT
VFL
OPT
SYNC
MCC
WC
MCB
MCA
SKSY
XI
XO
P256
LOCK
Vss
TC
DIM1
DIM0
DOM1
DOM0
KM1
I
O
O
O
O
O
O
O
O
O
I
I
O
O
O
O
I
I
I
I
I
Auxiliary input for audio data
Asynchronous buffer operation flag
Audio data output
Parity flag output
Fs x 1 Synchronous output signal for DAC
Fs x 1 Synchronous output signal for DSP
Fs x 64 Bit clock output
Fs x 1 Word clock output
Fs x 128 Bit clock output
Fs x 256 Bit clock output
Clock synchronization control input
Crystal oscillator connection or external
clock input
Crystal oscillator connection
VCO oscillating clock connection
PLL lock flag
Logic section power (GND)
PLL time constant switching output
Data input mode selection
Data input mode selection
Data output mode selection
Data output mode selection
Clock mode switching input 1
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
RSTN
Vdda
CTLN
PCO
(NC)
CTLP
Vssa
TSTN
KM2
KM0
FS1
FS0
CSM
EXTW
DDIN
LR
Vdd
ERR
EMP
CD0
CCK
CLD
I
I
O
I
I
I
I
O
O
I
I
I
O
O
O
O
I
I
System reset input
VCO section power (+5V)
VCO control input N
PLL phase comparison output
VCO control input P
VCO section power (GND)
Test terminal. Open for normal use
Clock mode switching input 2
Clock mode switching input 0
Channel status sampling frequency
display output 1
Channel status sampling frequency
display output 0
Channel status output method selection
External synchronous auxiliary input
word clock
EIAJ (AES/EBU) data input
PLL word clock output
Logic section power (+5 V)
Data error flag output
Channel status emphasis control code
output
3-wire type microcomputer interface data
output
3-wire type microcomputer interface clock
input
3-wire type microcomputer interface load
input
YM3436DK (XG948E0) DIR2 (Digital Format Interface Receiver)
MAIN: IC123
PIN
NO.
I/O
FUNCTION
NAME
PIN
NO.
I/O
FUNCTION
NAME
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
NC
/CS
GND
A1
A0
P27
P26
P25
P24
P20
P21
P22
P23
P10
P11
P12
IC
P13
P14
P15
P16
P17
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Chip select
Ground
Address bus
Address bus
Port 2
Port 1
Internally Connected (N.C.)
Port 1
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
VDD
D7
D6
D5
D4
D3
D2
D1
D0
RESET
NC
NC
/WR
P07
P06
P05
P04
P03
P02
P01
P00
/RD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
Power supply
Data bus
Reset
Write strobe
Port 0
Read strobe
µPD71055GB-3B4 (XH600A00) PIO (Parallel Interface Unit)
MAIN: IC126
