Yamaha CD-C600, Service Manual

Page: 47 / 64

★
All voltages are measured with a 10MΩ/V DC electronic voltmeter.
★
Components having special characteristics are marked
⚠
and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
47
MAIN 1/2
CD-C600
SCHEMATIC DIAGRAMS
IC4
IC2
IC7
IC8
IC5
CB4
CB1
CB2
CB3
IC1
CB6
IC6
CB5
iPod/USB IN
iPod/USB IN
DIGITAL OUT
ANALOG OUT
CD IN
0
0
0
0
0
1.7
1.7
1.2
3.3
3.3
3.3
3.2
3.2
0.6
0
3.3
1.7
1.7
1.7
1.7
2.5
0.2
0
0
0
0
2.0
2.0
3.3
1.8
1.8
1.8
1.9
1.9
1.9
3.3
3.3
3.3
0
0
0
0
0
3.2
2.5
1.7
3.3
2.0
1.9
1.9
1.9
1.9
0.2
3.2
3.3
3.3
3.4
0
0
3.0
0
0
0
0
3.0
3.4
3.2
7.2
7.2
1.7
1.7
1.7
0
7.2
1.3
1.2
3.3
3.3
3.4
3.2
0
0
0.3
0.3
1.7
1.7
1.7
1.7
1.7
1.0
4.0
3.3
1.7
1.7
1.7
1.7
0.4
3.3
3.4
3.2
3.3
1.8
2.0
0
0
1.9
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3.3
3.3 3.3
3.3
3.3
3.3
0
0
3.3
3.3
2.4
3.3
3.3
1.7
1.7
0
3.3
3.3
3.3
3.3
0
0
0
0
1.7 3.3 3.3
1.7
1.7
1.7 1.7 1.6
1.6 1.6
3.3 3.3 3.3 0 0
0 0
0
3.3
3.3 1.7 1.7
1.7 1.7
1.7 1.7 1.2 3.3 1.6
1.6
3.3
3.3
3.3
0
3.3
0
0
0
0.9
0 0 0 0 0 0 0 0
0.6
3.3
3.3 3.3
0
0 0 0
0 0 0 0
1.9 3.3
3.3
0
0
0
0
0
0
3.3
3.3
3.3
3.3
3.2
3.2
3.2
1.8
1.8
0
POINT A XL1 (Pin 73 of IC2) POINT B XL2 (Pin 6 of IC7)
A
B
V
IN
4
EN 1
2
5
GATE
CONTROL
UVLO
THERMAL
SHUTDOWN
CURRENT
LIMIT
FLAG
DELAY
V
OUT
3 FLG
GND
IC6 : R5523N001A-TR-F
High side switch IC
1
3
2
5
4
GND
V
CC
IC4 : TC7SH08FU
2-input AND gate
IN A
IN B
OUT Y
IC2 : LC786922E-01UY-E
CMOS LSI compact disc player IC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
22 21
EFMIN LRSY
DATACK
DATA
TEST
STDATA
STCK
STREQ
MODE
CONT0
CONT1
CONT2
SUB_READY0
REG_READY0
RESB
DO
DI
CL
CE
RFOUT
LPF
SLICE
LEVEL
CONTROL
LPF
INTERPOLATION MUTE
SRC
PLL3
Memory I/F
CD PLL
DOUT Control
PORT CONTROL
SERVO
CONTROL
SUBCODE
DECODER
TEXT
DECODER
ROM
DECODER
MP3, WMA,
DECODER
Memory
1 M Bit
Synchronization
Detection
EFM
Demodulation
ERROR CORRECTION
PCM Output Control
Stream Control/Audio Input
CLOCK
GENERATOR
8FS DIGITAL FILTER/
1 bit DAC
Audio Control
MUTE/DEEMPHASIS/
ATTENUATION CONTROL/
BASS/TREBLE/
HFC Filter
Audio Output
Control
MONITOR
RF
SIGNAL
PROCESSOR
VREF
TES, HFL,
DEFECT
JITTER
APC
D/A
A/D
PHLPF
AIN
CIN
BIN
DIN
SLCISET
RFMON
VREF
JITTC
EIN
FIN
PCNCNT
TE
TEIN
LDD
LDS
AVSS
AVDD
FDO TDO
SLDO
SPDO
VVSS1
PDOUT1 PDOUT0
PCKIST
VVDD1 CONT5 CONT3
DEFECT
FSEQ
C2F
DVDD
DVSS
DVDD15
VVDD3
VVSS3
SLCO LRVSS RCHO LRREF LCHO LRVDD XVDD XIN XOUT XVSS CONT4 DOUT DVDD DVSS DVDD15 PCMREQ PCMDATA PCMBCK PCMLRSY DVDD
DVDD
DVSS
23 24 25 27 26 30 31 32 33 34 35 36 37 38 39 40 28 29
79 80 78 77 76 74 75 71 70 69 68 67 66 65 64 63 62 61 73 72
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
System
Control
MCU
I/F
IC1 : LA6565-TE-L-E
Power amplifier 5-channel built-in
1
Input
FWD
2 REV
3 VCCP2
4 VLO-
5 VLO+
6 VO4+
7 VO4-
8 VO3+
9 VO3-
10 VO2+
11 VO2-
12 VO1-
13 VO1+
14
+
-
+
-
+
-
VCCP1
Power System GND
Power
System
GND
Power System GND
Signal System GND
MUTE
(LOAD output voltage setting)
Turns ON/OFF a
corresponding CH
H: Output ON
L: Output OFF
11k
11k
44k To VREFOUT
15 VCCS
16 VIN1+
17 VIN1-
18 VIN1
SGND
Unit
Resistance: ohm
VCONT
MUTE1
MUTE234
VIN4-
VIN4
VREF_IN
VREF_OUT
REG_OUT
REG_IN
VIN+OP
VIN-OP
VO_OP
VIN3
VIN3-
VIN2
VIN2-
VIN2+
FR
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
FR
(VCC)
REG_IN
REG_OUT
Thermal Shutdown
Level Shift
Level Shift
+
-
44k
Level Shift
+
-
Output Control
Level Shift
+
-
+
-
+
-
11k
44k
+
-
To VREFOUT
CH1
CH2,3,4
+
-
+
-
11k
44k
+
-
+
-
IC8 : MFI341S2161
IC digital
H8/300H
MICROPROCESSOR
System control
I/O port
P4/IRQ
P3/IRQ
P2/IRQ
P1/IRQ
RES
Internal address bus
Internal data bus
11
12
14
15
16 17 18 19 20
10
Vss
NC
P2/IRQ
Top view
9 8 7 6
13
5
4
2
1
3
Vcc
Vss
RNG
WDT
FMU
Voltage monitoring circuit
Security logic
ROM (112 kbytes)
RAM (4 kbytes)
Interval timer 1
Interval timer 2
Register
(512 bytes)
Modular multiplication
coprocessor
EEPROM (16 2 kbytes)
On-chip
oscillator
Power-on
reset circuit
P1/IRQ
P3/IRQ
Vcc
NC
NC
NC NC NC NC NC
NC NC NC NC NC
RES
P4/IRQ
IC7 : LC87F1HC8A-F5AL1-E
CMOS LSI
SIO0
Port 0
Port 1
Port 2
Port 3
Port 7
UART1
ADC
Audio interface
Infrared remote
control receiver circuit
INT0 to INT7
Noise filter
Bus interface
Interrupt control
Standby control
CF USB PLL
Clock
generator
RC
X’tal
ACC
B register
C register
ALU
PSW
RAR
RAM
Stack pointer
Watchdog timer
Onchip debugger
PC
FROM
PLA IR
SIO1
SIO4
SIO9
Timer 0
Timer 1
Timer 4
Timer 5
Timer 6
Timer 7
Base timer
PWM0
PWM1
USB host
CD CONTROLLER
USB INTERFACE
CURRENT LIMIT
SWITCH
ACTUATOR DRIVER
No replacement part available.
to OPERATION (4)_W703
Page 49 L4
To PU mechanism unit
To PU mechanism unit