Yamaha AX-V465, Service Manual

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RX-V465/HTR-6240/
AX-V465
RX-V465/HTR-6240/AX-V465
* Input voltage: 1= -0.3 to 3.6V, Is =-0.3 to 5.5V
* Output voltage: 0= -0.3 to 3.6V
* Pins 2, 4, 5, 8, 9, 10, 24, 38, 39, 40, and 41 have an internal pull-down resistor (Pd).
Their level is fixed when they are unselected.
* Pins 32 and 33 are input pins for chip address setting when pin 41 is held at the low level.
*
Pin 34 serves as the input pin for designating as the master or slave when pin 41 is held at the low level.
* Pin 35 serves as the input pin for configuring the I/O of pins 44 to 47 when pin 41 is held at the low level.
* The DVDD and AVDD pins must be held at the same level and turned on and off at the same timing to preclude latch-up conditions.
Pin No. Function Name I/O Detail of Function
1 RXOUT1 O RX0-6 input S/PDIF through output pin 1
2 RX0 l
5
(pd)
5V withstand voltage TIL input level compatible S/PDIF input pin
(connected to GND when RX1 is set)
3 RX1 I(pd)
Co-axial compatible S/PDIF input pin
(supported demodulation sampling frequency of up to 96 kHz)
4 RX2 l
5
(pd)
5V withstand voltage TIL input level compatible S/PDIF input pin
(connected to GND when RX1 is set)
5 RX3 l
5
(pd) 5V withstand voltage TIL input level compatible S/PDIF input pin
6 DGND Digital GND
7 DVDD Digital power supply (3.3V)
8 RX4 l
5
(pd) 5V tolerable TIL input level compatible S/PDIF input pin
9 RX5 l
5
(pd) 5V tolerable TIL input level compatible S/PDIF input pin
10 RX6 l
5
(pd) 5V tolerable TIL input level compatible SIPDIF input pin
11 DVDD Digital power supply (3.3V)
12 DGND Digital GND
13 LPF O PLL loop filter connection pin
14 AVDD Analog power supply (3.3V)
15 AGND Analog GND
16 RMCK O R system clock output pin (VCO, 512fs, XIN)
17 RBCK O/I R system bit clock 1/0 pin (64fs)
18 DGND Digital GND
19 DVDD Digital power supply (3.3V)
20 RLRCK O/I R system LR clock 1/0 pin (fs)
21 RDATA O Serial audio data output pin
22 SBCK O S system bit clock output pin (16fs, 32fs, 64fs, 128fs)
23 SLRCK O S system LR clock output pin (fs/4, fs/2, fs, 2fs)
24 SDIN l
5
External serial audio data input pin
25 DGND Digital GND
26 DVDD Digital power supply (3.3V)
27 XMCK O Oscillation amplifier clock output pin
28 XOUT O Output pin connected to the resonator
29 XIN I External clock input pin. connected to the resonator (12.288 MHz or 24.576 MHz)
30 DVDD Digital power supply (3.3V)
31 DGND Digital GND
32 MOUT I/O Emphasis information II input fs monitor output II chip address setting input pin
33 AUDIO I/O Channel status bit 1 output II chip address setting input pin
34 CKST I/O Clock switching transition period signal output II master/slave setting input pin
35 INT I/O Microcontroller interrupt signal output II pins 44-48 I/O setting input pin
36 RERR O PLL lock error and data error flag output pin
37 DO O CCB microcontroller I/F, read data output pin (3-state)
38 DI l
5
CCB microcontroller I/F, write data input pin
39 CE l
5
CCB microcontroller I/F, chip enable input pin
40 CL l
5
CCB microcontroller I/F, clock input pin
41 XMODE l
5
System reset input pin
42 DGND Digital GND
43 DVDD Digital power supply (3.3V)
44 GPIOO O/I General-purpose I/O pin II selector input pin (output referred to RMCK pin)
45 GPI01 O/I General-purpose I/O pin II selector input pin (output referred to RBCK pin)
46 GPI02 O/I General-purpose I/O pin II selector input pin (output referred to RLRCK pin)
47 GPI03 O/I General-purpose I/O pin II selector input pin (output referred to RDATA pin)
48 RXOUT2 O RX0-6 input S/PDIF through output pin 2