Xycom XVME-113, User Manual

Page: 55 / 75

XVME-113 RAM/ROM Memory Module
October 1992
A-3
Table A-1. VMEbus Signal Identification (Continued)
Signal
Mnemonic
Connector
and
Pin Number Signal Name and Description
BR0*-BR3*
DS0*
DS1*
DTACK*
D00-D15
GND
1B:12-15
1A:13
1A:12
1A:16
1A:1-8
1C:1-8
1A:9,11,
15,17,19,
1B:20,23
1C:9
2B:2,12,
22,31
BUS REQUEST (0-3): Open-collector driven signals generated by
Requesters. These signals indicate that a DTB master in the daisy-chain
requires access to the bus.
DATA STROBE 0: Three-state driven signal that indicates during byte and
word transfers that a data transfer will occur on data bus lines (D00-D07).
DATA STROBE 1: Three-state driven signal that indicates during byte and
word transfers that a data transfer will occur on data bus lines (D0-D15).
DATA TRANSFER ACKNOWLEDGE: Open-collector driven signal
generated by a DTB slave. The falling edge of this signal indicated that valid
data is available on the data bus during a read cycle, or that data has been
accepted from the data bus during a write cycle.
DATA BUS (bits 0-15): Three-state driven, bi-directional data lines that
provide a data path between the DTB master and slave.
GROUND