Power Consumption
•
+5V/6.8A (Celeron 333 MHz, 512 MB SDRAM), +12V:170A (maximum) , -12V:60A (maximum)
Operating Humidity
•
5 - 95 % , non-condensing
WATCHDOG TIMER
The Watchdog Timer is provided to ensure that standalone systems can recover from
catastrophic conditions that cause the CPU to crash. This condition can occur from ex-
ternal EMI or a software bug. When the CPU stops working correctly, hardware on the
board will either perform a hardware reset (cold boot) or a Non-Maskable Interrupt
(NMI) to bring the system back to a known state.
Two I/O ports control the Watchdog Timer:
443 (hex)
Read
Enable to refresh the Watchdog Timer
043 (hex)
Read
Disable the Watchdog Timer
To enable the Watchdog Timer, a read from I/O port 443H must be performed. This
will enable and activate the countdown timer which will eventually timeout and either
reset the CPU or cause a NMI, depending on the setting of JP7. To ensure that this re-
set condition does not occur, the Watchdog Timer must periodically be refreshed by
reading the same I/O port 433H. This must be done within the timeout period that is
selected by jumper group JP8.
A tolerance of at least 30% must be maintained to avoid unknown routines within the
operating system (DOS), such as disk I/O that can be very time consuming. Therefore,
if the timeout period has been set to 10 seconds, the I/O port 443H must be read
within 7 seconds.
Note:
When exiting a program, it is necessary to disable the Watchdog Timer, otherwise
the system will reset.
9
Features
