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xCORE VocalFusion 4-Mic Kit for Amazon AVS Hardware Manual
6
I2C bus
The BaseBoard has a main I2C bus that is used to control the DAC, clock generator,
and EEPROM. This main I2C bus is connected to tile 1 of the XVF3000, with the
XVF3000 acting as a master on this I2C bus.
Pin
Port
Signal
X1D26
P4E0
I2C_SCL
X1D27
P4E1
I2C_SDA
The addresses of devices on the I2C bus are shown below.
Device
Address
Si5351A (Clock)
0b1100010
0x62
CS43L21 (DAC)
0b1001010
0x4A
24LC08B (EEPROM on microphone board)
0b1010Xxx
0x5x
Please refer to the 24LC08B datasheet for details on how to set the address of the
EEPROM.
The BaseBoard also has a secondary I2C bus, on which the XVF3000 is a slave -
so allowing the XVF3000 to be controlled by an external I2C host. This slave I2C
interface is wired up to the extension header (see §
, below).
XM011897A