xiX - Technical Manual Version 1.3
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3.10.3.
Non-isolated Digital Lines
Non isolated Digital lines can be used as inputs or outputs compatible with TTL logic. These are high impedance pins so when
used as output high impedance slave input has to be used.
figure 3-60, non isolated input/output, interface schematic
3.10.3.1.
Non-isolated Digital Input/Output (INOUT) General info
Item
Parameter/note
Number of digital lines
2, each line can be configured by application separately as input or
output
Maximum input voltage
24V DC
Common pole
Yes, AUX power GND
Effect of incorrect input terminal connection
Reverse voltage polarity protected
Effects when withdrawing/inserting input module
under power
No damage, no lost data
Protection
Short-circuit/over-current/reverse voltage
Maximal output sink current
30µA, maximum advised load = 60k
Ω
Inductive loads
No
Output level logical 0
<0.4V, Load 100k
Ω
Output level logical 1
>2.5V, Load100k
Ω
(max. 3.3V)
Output delay – rising edge
400ns, Load 100k
Ω
, threshold 2V
Output delay - falling edge
450ns, Load 100k
Ω
, threshold 0.5V
Input impedance – minimum
15k
Ω
Input level for logical 0
<0.7V
Input level for logical 1
≥
3.3V
Input debounce filter
No
Input delay – rising edge
750ns, V
INPUT
=5V,T
AMBIENT
=25°C
Input delay – falling edge
1
1200ns, V
INPUT
=5V,T
AMBIENT
=25°C
Input functions
Trigger, get current level; Rising or falling edge are supported for
trigger
Output functions
Off, On, Exposure active, Frame active; Signal inversion supported
table 3-45, General info for non-isolated digital in/out trigger lines.
NOTE 1) Because of low input impedance of non-isolated input it is not possible to connect master slave of two cameras directly.
Signal conditioning (buffer, opamp…) is required
FPGA GPIO
100R
10k
1k0
10p
10
0k
GND
GND
GND
INOUT