Xilinx ZCU102, User Manual

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ZCU102 Evaluation Board User Guide www.xilinx.com 46
UG1182 (v1.2) March 20, 2017
Chapter 3: Board Component Descriptions
• Programmable oscillator: Silicon Labs Si570BAB001614DG (10 MHz-810 MHz)
• LVDS differential output
• Total Stability: 61.5 ppm
The user clock circuit is shown in Figure 3-9 . The Silicon Labs Si570 and Si53340 data sheets
are available on the Silicon Labs website [Ref 17] .
Programmable User MGT Clock
[ Figure 2-1 , callout 9]
The ZCU102 board has a programmable low-jitter 3.3V LVDS SI570 differential oscillator
(U56) connected to a 1-to-2 SI53340 clock driver (U51). On power-up the user clock defaults
to an output frequency of 156.250 MHz. User applications can change the output frequency
within the range of 10 MHz to 810 MHz through an I2C interface. Power cycling the ZCU102
board reverts this user clock to the default frequency of 156.250 MHz.
This oscillator can be reprogrammed from MSP430 system controller U41 (see TI MSP430
System Controller, page 105 for more information).
• Programmable oscillator: Silicon Labs Si570BAB000544DG (10 MHz-810 MHz)
• LVDS differential output
• Total stability: 61.5 ppm
The user clock MGT circuit is shown in Figure 3-10 . The Silicon Labs Si570 and Si53340 data
sheets are available on the Silicon Labs website [Ref 17] .
X-Ref Target - Figure 3-9
Figure 3-9: Programmable User Clock
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