XC4000E and XC4000X Series Field Programmable Gate Arrays
4-22
March 30, 1998 (Version 1.5)
Q
Flip-
Flop/
Latch
D
D
CE
CE
Q
Out
T
Output
Clock
I
Input
Clock
Clock
Enable
Delay
Pad
Flip-Flop
Slew Rate
Control
Output
Buffer
Input
Buffer
Passive
Pull-Up/
Pull-Down
2
I
1
X6704
Figure 16: Simplified Block Diagram of XC4000E IOB
Q
Flip-Flop/
Latch
Fast
Capture
Latch
D
Q
Latch
D
G
D
0
1
CE
CE
Q
Out
T
Output Clock
I
Input Clock
Clock Enable
Pad
Flip-Flop
Slew Rate
Control
Output
Buffer
Output MUX
Input
Buffer
Passive
Pull-Up/
Pull-Down
2
I
1
X5984
Delay
Delay
Figure 17: Simplified Block Diagram of XC4000X IOB (shaded areas indicate differences from XC4000E)
