Xilinx Virtex-II Pro PPC405, User Manual

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834 www.xilinx.com March 2002 Release
1-800-255-7778 Virtex-II Pro™ Platform FPGA Documentation
Appendix C: Simplified Mnemonics
R
Other Simplified Mnemonics
No Operation
The preferred form of the no-operation instruction (no-op) is shown in Table C-21 .
Load Immediate
The simplified mnemonics in Table C-22 provide a shorthand for loading an immediate
signed value into a register.
Load Address
The load-address simplified mnemonic in Table C-23 computes the value of a base-
displacement operand (register-indirect with immediate index addressing). This
mnemonic is useful for obtaining the address of a variable specified by name. The
assembler substitutes the name
variable with the appropriate values of r A and d in the
address syntax d( r A).
Move Register
The simplified mnemonics in Table C-24 provide a shorthand for moving the contents of a
GPR to another GPR.
Complement Register
The simplified mnemonics in Table C-25 provide a shorthand for complementing the
contents of a GPR.
Table C-21: Simplified Mnemonic for No-op
Operation Simplified Mnemonic Equivalent Mnemonic
No operation nop ori 0, 0, 0
Table C-22: Simplified Mnemonics for Load Immediate
Operation Simplified Mnemonic Equivalent Mnemonic
Load Immediate li r D, SIMM addi r D, 0, SIMM
Load Immediate Shifted lis r D, SIMM addis r D, 0, SIMM
Table C-23: Simplified Mnemonic for Load Address
Operation Simplified Mnemonic Equivalent Mnemonic
Load Address la r D, d( r A) addi r D, r A, d
la r D, variable addi r D, r A, d
( r A, d substitution by assembler)
Table C-24: Simplified Mnemonics for Move Register
Operation Simplified Mnemonic Equivalent Mnemonic
Move Register
mr r
A,
r
S
or r
A,
r
S,
r
S
mr. r A, r S or. r A, r S, r S