Xilinx Virtex-II Pro PPC405, User Manual

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March 2002 Release www.xilinx.com 575
Virtex-II Pro™ Platform FPGA Documentation 1-800-255-7778
Alphabetical Instruction Listing
R
addi
Add Immediate
Description
If the r A field is 0, the SIMM field is sign-extended to 32 bits and loaded into register r D. If
the r A field is nonzero, the SIMM field is sign-extended to 32 bits and added to the contents
of register r A . The resulting sum is loaded into register r D.
Simplified mnemonics defined for this instruction are described in the following sections:
• Load Address , page 834 .
• Load Immediate , page 834 .
• Subtract Instructions , page 831 .
Pseudocode
( r D)
←
( r A|0) + EXTS(SIMM)
Registers Altered
• r D.
Exceptions
• None.
Compatibility
This instruction is defined by the PowerPC user instruction-set architecture (UISA). It is
implemented by all PowerPC processors.
addi r D, r A, SIMM
D Instruction Form
14 r D r A SIMM
0 6 1
1 1
6 3
1