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Virtex-5 LXT/SXT/FXT FPGA Prototype Platform
UG229 (v3.0.1) May 21, 2008
Detailed Description
R
6d. Downstream Interface Connector
The downstream interface connector (P4) passes serial configuration information to the
DUT in the downstream prototype platform board (
Figure 8
).
7. Prototyping Area
The prototyping area accommodates 0.10-inch spaced ICs. The kit contains headers that
can be soldered to the breakout area, if desired. Power and ground buses are located at the
top and bottom edges, respectively, of the prototyping area.
8. VCCO-Enable Supply Jumpers
Virtex-5 FPGAs have 9 to 33 SelectIO banks (J44 and J45), labeled VCCO_0 to VCCO_34,
each with a V
CCO
-enable supply jumper. The V
CCO
-enable supply jumpers can connect
each bank to one of the two onboard supplies, the V
CCINT
or V
CCO
supplies. These jumpers
must be installed for the Virtex-5 device to function normally.
9. VBATT
An onboard battery holder (B1) is connected to the VBATT pin of the DUT. If an external
power supply is used, the associated jumper must be removed; instead, use a 12-mm
lithium coin battery (3V).
X-Ref Target - Figure 8
Figure 8:
Downstream Interface Connector (44-Pin Male)
UG229_0
8
_050407
GND
NC
NC
GND
GND
GND
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DOUT_BU
S
Y
NC
NC
CLK
DONE
NC
NC
NC
NC
INIT
PROG
NC
NC
NC
NC
NC
NC
NC
GND
GND
GND
GND
GND
GND
GND
NC
NC
GND
A1
A2
A
3
A4
A5
A6
A7
A
8
A9
A10
A11
A12
A1
3
A14
A15
A16
A17
A1
8
A19
A20
A21
A22
B1
B2
B
3
B4
B5
B6
B7
B
8
B9
B10
B11
B12
B1
3
B14
B15
B16
B17
B1
8
B19
B20
B21
B22
