Xilinx VCU110, User Manual

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VCU110 Evaluation Board www.xilinx.com 45
UG1073 (v1.2) March 26, 2016
Chapter 1: VCU110 Evaluation Board Features
User SMA Clock
[ Figure 1-2 , callout 15]
The VCU110 evaluation board provides an SMA pair for the user to source a differential
LVDS clock to FPGA U1 Bank 67. USER_SMA_CLOCK_P and USER_SMA_CLOCK_N are
connected to XCVU190 FPGA U1 (V
CCO
1.5V) HP Bank 67 GC pins AY27 and AY28,
respectively. A 100 Ω differential termination resistor is present on the board for these
inputs.
The SMA input circuit is shown in Figure 1-13 .
X-Ref Target - Figure 1-13
Figure 1-13: VCU110 User SMA Clock
USER_SMA_CLOCK_P
USER_SMA_CLOCK_N
SIG
GND1
GND4
GND3
GND2
J34
3
4
5
2
1
32K10K-400L5
SIG
GND1
GND4
GND3
GND2
32K10K-400L5
1
2
5
4
3
J35
GND
1
2
R1448
100
1/10W
1%
;
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