Modifying Xilinx ML605 for Direct JTAG Access
7
©1989-2021 Lauterbach GmbH
Pinout of the JTAG to Xilinx ML605 Adaptor
The “JTAG to Xilinx ML605” adaptor converts from the pinout of the Lauterbach TRACE32 PPC dongle
(also used for debugging MicroBlaze) to the JTAG header J5 on the HW-FMC-105-DEBUG board.
The design needs to take into account that the FMC daughter boards for ML605 are intended to host
devices
inside the JTAG chain
i.e. extending the chain by an additional device. The debugger, however,
needs to be at the beginning and the end of the JTAG chain to drive the signals. Therefore the adaptor
connects its TDI line to the TDO signal of the HW FMC 105 DEBUG board. The additional TDO pin on the
adaptor receives the TDO signal of the last device of the board (the Virtex6 FPGA).
PPC dongle
J5 on HW-FMC-105-
DEBUG
TDO
1
extra Pin
last device TDO
TDI
(TDO_ML605)
3
6
TDO
(TDO_ML605)
TCK
7
4
TCK
TMS
9
9
TMS
VCC
6
1
VCC
GND
16
2 GND
NOTE:
For trouble shooting or JTAG chain diagnostics you might want to connect a
Xilinx platform cable to the HW_FMC_105_DEBUG daughter board. In this
case you also need to
cross TDI and TDO
as explained above or connect it to
the Lauterbach adaptor
.
