Xilinx ML501 User Manual Download Page 5

ML501 Reference Design

www.xilinx.com

5

UG227 (v1.0) June 18, 2007

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Preface

About This Guide

This user guide introduces several designs that demonstrate the Virtex™-5 LX device 
features using the using the ML501 Evaluation Platform. 

Additional Documentation

The following documents are also available for download at 

http://www.xilinx.com/virtex5

.

Virtex-5 Family Overview

The features and product selection of the Virtex-5 family are outlined in this overview.

Virtex-5 Data Sheet: DC and Switching Characteristics

This data sheet contains the DC and Switching Characteristic specifications for the 
Virtex-5 family.

XtremeDSP™ Design Considerations

This guide describes the XtremeDSP slice and includes reference designs for using the 
DSP48E slice.

Virtex-5 Configuration Guide

This all-encompassing configuration guide includes chapters on configuration 
interfaces (serial and SelectMAP), bitstream encryption, Boundary-Scan and JTAG 
configuration, reconfiguration techniques, and readback through the SelectMAP and 
JTAG interfaces.

Virtex-5 Packaging Specifications

This specification includes the tables for device/package combinations and maximum 
I/Os, pin definitions, pinout tables, pinout diagrams, mechanical drawings, and 
thermal specifications.

Additional Support Resources

To search the database of silicon and software questions and answers, or to create a 
technical support case in WebCase, see the Xilinx website at:

http://www.xilinx.com/support

.

Summary of Contents for ML501

Page 1: ...R ML501 Reference Design User Guide UG227 v1 0 June 18 2007...

Page 2: ...ER GIVEN BY XILINX OR ITS AGENTS OR EMPLOYEES XILINX MAKES NO OTHER WARRANTIES WHETHER EXPRESS IMPLIED OR STATUTORY REGARDING THE DESIGN INCLUDING ANY WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTI...

Page 3: ...This Guide Additional Documentation 5 Additional Support Resources 5 Typographical Conventions 6 Online Document 6 ML501 Reference Design Introduction 7 Reference Designs 8 Base System Builder 8 EDK...

Page 4: ...4 www xilinx com ML501 Reference Design UG227 v1 0 June 18 2007 R...

Page 5: ...Design Considerations This guide describes the XtremeDSP slice and includes reference designs for using the DSP48E slice Virtex 5 Configuration Guide This all encompassing configuration guide include...

Page 6: ...ee the Virtex 5 Configuration Guide for more information Emphasis in text The address F is asserted after clock event 2 Underlined Text Indicates a link to a web page http www xilinx com virtex5 Conve...

Page 7: ...Along with capabilities offered directly through an integrated IP block implemented in silicon the Xilinx LogiCORE IP catalog and the embedded processing IP catalog are available to system level desi...

Page 8: ...K BSB wizard described in the Embedded System Tools Reference Manual Ref 4 to create a hardware design for the ML501 platform Figure 1 shows a block diagram of the MicroBlaze processor based embedded...

Page 9: ...L501 platforms The Overview and Setup presentation shows how to set up the design and the test environment The Stand Alone Application presentation shows how to exercise the reference design using the...

Page 10: ...in menu to load and launch ACE file demonstrations button_led_test elf button_led_test ace button_led_test_readme txt Verifies functionality of GPIO DIP switches GPIO LEDs N E S W buttons and LEDs fla...

Page 11: ..._rebooter ace sysace_rebooter_readme txt User selectable loading of ACE files utilizing the System ACE CF controller test_ac97 elf test_ac97 ace test_ac97_readme txt Records and plays back audio using...

Page 12: ...the ML501 Evaluation Platform are 1 DS100 Virtex 5 Family Overview LX LXT and SXT Platforms 2 UG228 ML501 Getting Started Tutorial 3 UG226 ML501 Evaluation Platform User Guide 4 UG111 Embedded System...

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