Xilinx MIcroBlaze Development Spartan-3E 1600E Kit, Getting Started

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12 Getting Started with the MicroBlaze Development Kit - Spartan-3E 1600E Edition
www.xilinx.com UG258 (v1.3) November 30, 2007
Chapter 2: MicroBlaze Development Kit BlueCat Linux Reference System
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Hardware Specifics
This reference system targets the Spartan-3E 1600E Edition development board. The
system uses the MicroBlaze processor with cache turned on for both the instruction cache
(I-cache) and the data cache (D-cache). As shown in
Figure 2-1 , the system also includes the
MPMC memory controller, the XPS Ethernetlite, the XPS MCH EMC memory controller,
and the XPS UART Lite IP cores. An XPS Timer and XPS Interrupt controller are also
needed for the BlueCat Linux kernel.
See Table 2-1 for the address map of the system.
Block Diagram
The system is shown in Figure 2-1 .
Address Map
The address map for the IP cores in the reference system is given in Table 2-1 .
X-Ref Target - Figure 2-1
Figure 2-1: Block Diagram
UG25 8 _2_1_110507
MicroBl a ze
Proce ss or
MPMC
Xilinx S partan- 3 E FPGA
XP S
UARTLITE
XP S GPIO
EXTERNAL
MEMORY
(DDR)
XP S
ETHERNETLITE
XP S GPIO
XP S GPIO
XP S TIMER
XP S UART
Lite
XP S MCH EMC
XP S GPIO XP S S PI
IXCL
DXCL
PLBV46
S TRATA
FLA S H
MEMORY
S PI
FLA S H
Table 2-1: Reference System Address Map
Instance Peripheral Base Address High Address
debug_module mdm
0x41400000 0x4140FFFF
dlmb_cntlr lmb_bram_if_cntlr
0x00000000 0x00001FFF
ilmb_cntlr lmb_bram_if_cntlr
0x00000000 0x00001FFF
RS232_DTE xps_uartlite
0x40600000 0x4060FFFF
FLASH xps_mch_emc
0x85000000 0x85FFFFFF
SPI_FLASH xps_spi
0x40A00000 0X40A0FFFF
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