ChipScope Pro Software and Cores User Guide
217
UG029 (v14.3) October 16, 2012
ChipScope Pro Analyzer Core Troubleshooting
ChipScope Pro Analyzer Core Troubleshooting
This section deals with issues where the ChipScope Pro Analyzer tool can access the cable
and the JTAG chain but is either not detecting any debug cores in the Xilinx FPGAs or is
having trouble triggering an ILA core or displaying captured ILA core data.
•
For troubleshooting issues related to “INFO: Found 0 Core Units in the JTAG device
Chain" messages, see
•
For troubleshooting issues related to “Waiting for upload" messages, see
.
•
For troubleshooting issues related to "ERROR: Fatal - Did not find trigger mark in
buffer. Data buffer may be corrupt!” messages, see
.
Table A-8:
Troubleshooting Core Detection Issues
Issue(s)
Solution(s) or Work-Around(s)
1.
On attempting to connect to the cable
you see the following message in the
console:
INFO: Found 0 Core Units in the
JTAG device Chain
There are a number of reasons why
the ChipScope Pro Analyzer tool
might not be able to detect the core
units. The ChipScope Pro Analyzer
tool polls the JTAG chain for a status
word that indicates the number and
type(s) of core(s) in the device. The
reading of the status word can result
in corrupt date either by noise on the
JTAG TAP signals or a timing issue in
the design that affects the core.
Go to Issue #2..
2.
Are the ChipScope Pro ICON
(integrated controller), ILA
(integrated logic analyzer), VIO
(virtual input/output), and/or ATC2
(Agilent trace core) debug cores
implemented correctly or even
present in the design?
If NO or NOT SURE: Verify that the cores are in the design by performing
the following steps:
1.
Open the FPGA Editor to edit the placed-and-routed NCD file of
your design.
2.
Go to
Tools
>
ILA
. A window displays all the probed signals. If an
error message appears specifying, "There is no ILA Core," your
design does not contain an ILA debug core.
If no cores are detected, you must go back to your design and determine
why the core was not implemented. The synthesis and translate reports
can tell you if all the netlists are correctly implemented, including the ILA
Core and the ICON Core. Also check that the NCF (netlist constraints file)
associated with the core was applied. If the core netlist file (*.ngc/ngo) was
moved during implementation the associated constraint file (*.ncf) might
not have been moved accordingly.
If YES: Go to Issue #3.
