Chapter 1 Introduction to GDM12864A LCM
5
Interface Pin Connections
Pin
No.
Symbol
I/O Type Description
1
VSS
Supply
Ground
2
VDD
Supply
Power supply
3
V0
Supply
LCD driver supply voltage
4
D/I
Data input/output pin of internal shift register
MS SHL DIO1 DIO2
H H Output Output
H L Output Output
L H Input Output
L L Output Input
5
R/W
Read or Write
RW Description
H Data appears at DB[7:0] and can be read by the CPU while
E= H CS1B=L,CS2B=L and CS3=H.
L Display data DB[7:0] can be written at falling edge of E
when CS1B=L, CS2B=L and CS3=H.
6
E
Enable signal
E Description
H Read data in DB[7:0] appears while E= “High”.
L Display data DB[7:0] is latched at falling edge of E.
7
DB0
8
DB1
9
DB2
10
DB3
11
DB4
12
DB5
13
DB6
14
DB7
I/O
Data bus [0~7]
Bi-directional data bus
15
16
CS1
CS2
I
Chip selection
When CS1=H,CS2=L, select IC1
When CS1=L,CS2=H, select IC2
17
RESETB I
Reset signal.
When RSTB=L
?
1
?
ON/OFF register becomes set by 0.(display off)
?
2
?
display start line register becomes set by 0 (Z-address 0 set, display
from line 0)
?
3
?
After releasing reset , this condition can be changed only by
instruction.
18
VEE
Power
VEE is connected by the same voltage.
19
A
Back-light anode
20
K
Back-light cathode
