Xaoc Devices Drezno II Operator'S Manual Download Page 1 | Manualshive

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DR

EZN
O

binary

conversion

komputor ii
Model of 1989

operator’s manual

rev. 1989/2.0

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Summary of Contents for Drezno II

Page 1: ...DREZNO binary conversion komputor ii Model of 1989 operator s manual rev 1989 2 0...

Page 2: ...semitone steps and 20Vpp 256 semitone steps To better understand the device and avoid common pitfalls we strongly advise the user to read through the entire manual before us ing the module INSTALLATI...

Page 3: ...t digit bit is the least significant For example in an 8 bit system the highest bit represents 27 128 and the lowest bit represents 20 1 Since there are eight bits and each can have only two values th...

Page 4: ...4 fig 2 drezno ii interface controls overview 1 8 4 10 3 5 11 13 7 2 6 9 12...

Page 5: ...With gain set to max a 10Vpp input signal will fit the entire range while a hotter signal might need to be attenuated depending on the desired result The A D converter is clocked internally at a very...

Page 6: ...ation signals for the bit in puts Patching any cable into any DAC binary input breaks its normalization and overrides it with the external signal However with no signals patched to the inputs the conv...

Page 7: ...es through the Leibniz data ribbon cable It is possible to connect a chain of multiple Leibniz modules connected in series or even build a complex system with data splits and loops Feeding a time vary...

Page 8: ...For example if there is an active 5V gate at input 7 and 0V at all the re maining inputs the code is 10000000 which means 128 in the decimal system This is the middle number of the 0 255 range of num...

Page 9: ...ime about380ns Therefore the digital code resulting from this conversion is not instantly available For this reason Drezno II delays the clock s rising edge by about 450ns to account for conversion ti...

Page 10: ...e range of 10V to 10V is exceeded When the switch is set to low the DAC section halves its output range and the least significant bit is ignored In other words a 1 12V step corresponds to the input bi...

Page 11: ...dual binary outputs deliver pulse waveforms that flip between 0V and 5V many times per input period depending on the level of details they represent The average frequency of each individual input is t...

Page 12: ...RIGINALLY ACQUIRED HOWEVER IN SPECIFIC CASES WE RESERVE THE RIGHT TO CHARGE FOR LABOR PARTS AND TRANSIT EXPENSES WHERE APPLICABLE RETURN POLICY THE DEVICE INTENDED FOR REPAIR OR REPLACEMENT UNDER WARR...

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