WIRELESS CONNECTIVITY & SENSORS
User manual Thyone-I
6.1.1. Timing and Reset behaviour
The output of characters on the serial interface runs with secondary priority. For this reason,
short interruptions may occur between the outputs of individual successive bytes. The host
must not implement too strict timeouts between two bytes to be able to receive packets that
have interruptions in between.
When holding the module’s
pin LOW, the radio chip states are undefined. In this case
the module’s
pin may be pulled LOW by the radio module, such that the connected host
controller’s UART may detect a 0x00-byte with frame error.
To guarantee a clean UART communication, the host controller may not accept bytes with
frame errors and flush its RX buffer, after pulling the module’s
pin LOW.
Order code 2611011021000
40
Version 2.3 , July 2022