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User Manual
2.1.2. Pin Assignments
Table 1.
Pin interface family
Interface Family
Signal
Description
I/O
RF Interfaces
ANT1_DRX
Diversity antenna
I
ANT_GNSS
Reserved for GNSS receiver
I
ANT0_TRX
Main Antenna
I/O
User Identity Module
VREG_L6_UIM1
Power source for UIM
O
UIM1_DATA
Data in/out
I/O
UIM1_CLK
Clock signal
O
UIM1_RESET
Reset signal
O
UIM1_DETECT
UIM Detect signal
I/O
Data
Interfaces
USB 2.0
USB_HS_DP
USB Data Positive
I/O
USB Detect
USB Detect
I
USB_HS_DM
USB Data Negative
I/O
HSIC
HSIC USB_STROBE
HSIC USB Strobe
I/O
HSIC USB_DATA
HSIC USB Data
I/O
SGMII
SGMII_RX_P
SGMII receive - plus
I
SGMII_RX_M
SGMII receive - minus
I
SGMII_TX_P
SGMII transmit - plus
O
SGMII_TX_M
SGMII transmit - minus
O
SGMII_MDIO
SGMII Management data
I/O
SGMII_MDC
SGMII Management data clock I/O
UART1
UART1_CTS_N
Clear To Send for UART 1
I
UART1_RFR_N
UART ready for frame
O
UART1_RX
Receive for UART 1
I
UART1_TX
Transmit for UART 1
O
UART2
MDM_DBG_UART_RX
Receive for UART 2
I
MDM_DBG_UART_TX
Transmit for UART 2
O
I2C/2nd_ SPI
I2C_SDA
Data in/out
I/O
2nd_SPI_EN_1
2nd_SPI chip select
O
I2C_SCL
Clock signal
O
2nd_SPI_CLK
2nd_SPI serial clock
O
NC
NC
SPI_MOSI
2nd_SPI master out slave in
O
NC
NC