ITX-P-C444/Configuration
v1.0
www.winsystems.com
Page 15
7.4.10 J2 - LVDS and Backlight Header
The ITX-P-C444 supports single channel LVDS flat panel displays at 24 bpp.
The LVDS output signals are odd bus, differential signals to the LVDS
receiver. Each LVDS
P
output makes a differential pair with LVDS
N
.
Layout and Pin Reference
Connector
• Hirose DF13 Series 1.25 mm double row 30-pin
Part Number: DF13EA-30DP-1.25V(51
Matching Connector
• Hirose DF13C 1.25 mm double row 30-pin
Part Number: DF13-30DS-1.25C
Pi
n
Name
Description
Pin
Name
Description
1
LVDSAO_P
Channel A - Positive LVDS Output
2
LVDSBO_P
Channel B - Positive LVDS Output
3
LVDSAO_N
Channel A - Negative LVDS Output
4
LVDSBO_N
Channel B - Negative LVDS Output
5
GND
Ground
6
GND
Ground
7
LVDSCO_P
Channel C - Positive LVDS Output
8
LVDSDO_P
Channel D - Positive LVDS Output
9
LVDSCO_N
Channel C - Negative LVDS Output
10
LVDSDO_N
Channel D - Negative LVDS Output
11
GND
Ground
12
GND
Ground
13
LVDSCKO_P
Positive LVDS Clock Output
14
Not Connected
15
LVDSCKO_N
Negative LVDS Clock Output
16
Not Connected
17
GND
Ground
18
GND
Ground
19
VDD_5V
+5 VDC
20
VDD_3V3
+3.3 VDC
21
VDD_5V
+5 VDC
22
VDD_3V3
+3.3 VDC
23
GND
Ground
24
GND
Ground
25
BKLTPWM
Backlight PWM brightness control
26
BKLT_PWR
Backlight Power (+5 VDC or +12 VDC)
27
BKLT_EN
Backlight Enable
28
BKLT_PWR
Backlight Power (+5 VDC or +12 VDC)
29
SEL68
Select 8/6-bit
30
BKLT_PWR
Backlight Power (+5 VDC or +12 VDC)
1
2
29
30