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110502

PRODUCT MANUAL EPX-C380

26

SP1 - Speaker

Speaker

An on-board speaker,

SP1

, is available for sound generation.

Beep Codes

Reference the chart

Appendix-B

section of this manual for the appropriate beep codes.

CBL-AUDIO2-102-12

CBL-AUDIO5-102-12

Preliminary

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Summary of Contents for EPX-C380

Page 1: ...WinSystems Inc 715 Stadium Drive Arlington TX 76011 http www winsystems com WinSystems EPX C380 Intel ATOMTM EPIC Single Board Computer PRODUCT MANUAL P r e l i m i n a r y ...

Page 2: ...110502 PRODUCT MANUAL EPX C380 Revision Date Code ECO Number 110502 MANUAL REVISION HISTORY P N 400 0380 PP2 P r e l i m i n a r y ...

Page 3: ...g Timer 17 Real Time Clock Calendar 18 CONNECTOR REFERENCE 19 POWER 19 J6 Power and Reset 19 J8 ATX Signals 19 JP2 Power Supply Selection 20 BATTERY BACKUP 21 J4 External Battery 21 VIDEO 22 J1 ANALOG VGA 22 J7 LVDS 23 J5 Backlight Power 23 JP1 Panel Power 24 AUDIO 25 J10 HD Audio 25 SP1 Speaker 26 SERIAL 27 J18 COM1 COM2 COM3 COM4 27 USB 29 J9 J11 USB 29 SERIAL ATA 30 J13 J16 SATA 30 COMPACTFLASH...

Page 4: ...r 36 Register Definitions WS16C48 37 Register Details 37 PC 104 BUS 39 J12 J15 PC 104 39 PC 104 Plus BUS 40 J14 PC 104 Plus 40 MiniPCI EXPRESS 41 J502 MiniPCIe 41 BIOS SUPPLEMENTAL 42 BIOS SETTINGS STORAGE OPTIONS 65 CABLES 67 SOFTWARE DRIVERS 68 SPECIFICATIONS 69 MECHANICAL DRAWING 70 APPENDIX A 71 BEST PRACTICES 71 APPENDIX B 75 POST CODES 75 WARRANTY INFORMATION 80 P r e l i m i n a r y ...

Page 5: ...110502 PRODUCT MANUAL EPX C380 This page has been left intentionally blank P r e l i m i n a r y ...

Page 6: ...N EMBEDDED PC BY FAILING TO COMPLY WITH THESE BEST PRACTICES Reference Appendix A for Best Practices For any questions you may have on WinSystems products contact our Technical Support Group at 817 274 7553 Monday through Friday between 8 AM and 5 PM Central Standard Time CST Please review these guidelines carefully and follow them to ensure you are successfully using your embedded PC This product...

Page 7: ... J19 D12 D512 D513 D514 D515 D516 D517 D518 D519 D520 J8 ATX Power J6 Power J24 Digital I O Ports 3 4 5 J23 Digital I O Ports 0 1 2 J20 LPT J18 Serial I O COM 1 2 3 4 J11 USB 0 1 2 3 J9 USB 4 5 6 7 J5 Backlight Power J1 Analog VGA J15 PC 104 C D J12 PC 104 A B J10 HD Audio J16 SATA1 J7 LVDS J4 External Battery J21 Ethernet J13 SATA0 J14 PC 104 Plus J22 Intruder Detection J2 Fan P r e l i m i n a r...

Page 8: ...quare where applicable RESERVED J3 J19 D12 D512 D513 D514 D515 D516 D517 D518 D519 D520 JP5 COM1 Termination JP7 COM3 Termination J26 Ethernet LEDs Port 1 JP6 COM2 Termination JP8 COM4 Termination JP2 Power Supply Selection J25 Ethernet LEDs Port 2 JP1 Panel Power D14 Status LED JP4 EEPROM Enable JP3 CompactFlash Master Slave JP9 Digial I O Power P r e l i m i n a r y ...

Page 9: ... NOTE The reference line to each component part has been drawn to Pin 1 and is also highlighted with a square where applicable RESERVED J3 J19 D12 D512 D513 D514 D515 D516 D517 D518 D519 D520 J502 MiniPCIe J501 CompactFlash J500 Memory P r e l i m i n a r y ...

Page 10: ... SSD Slave default 3 4 SSD Write Protect 5 6 SSD Program Enable default 5 6 Disable Ethernet Device 2 7 8 Enable Ethernet Device 2 default 7 8 JP3 CompactFlash Solid State Disk Ethernet JP3 2 4 6 8 1 3 5 7 RS 422 Termination and Biasing Resistors TX 100 Places a 100Ω Resistor across the TX TX pair 3 4 RX 100 Places a 100Ω Resistor across the RX RX pair 7 8 TX 300 Places a 100Ω Resistor from 5V to ...

Page 11: ...3 1 2 JP1 Panel Power AT Power 1 2 3 4 5 6 7 8 default ATX Power 1 2 3 4 5 6 7 8 JP2 Power Supply Selection 2 4 6 8 JP2 1 3 5 7 JP1 3 2 1 JP9 Digital I O VCC 3 3V is provided at pin 49 of J23 J24 1 2 5V is provided at pin 49 of J23 J24 2 3 No Power at Pin 49 of J23 J24 default OPEN Avoid Simultaneous Jumpering of pins 1 2 and 2 3 Misjumpering causes damage to the board JP9 3 2 1 5V GND 3V P r e l ...

Page 12: ...110502 PRODUCT MANUAL EPX C380 12 This page has been left intentionally blank P r e l i m i n a r y ...

Page 13: ...battery backed user data space SRAM is not applicable for model EPX C380 S1 0 BIOS Phoenix Video Analog VGA or Flat Panel simultaneous operation Analog VGA resolution up to SXGA 1400x1050 Flat Panel resolution up to SXGA 1400x1050 Up to 18 bits pixel color panel LVDS SATA 2 SATA channels with speeds up to 300 Mbps Ethernet 2 Intel 10 100 1000 Mbps Gigabit controller one using PC82574 and one using...

Page 14: ...al RS 232 422 485 ports watchdog timer PS 2 keyboard and mouse controller and LPT The SBC also supports HD audio USB ports and is equipped with a CompactFlash socket and MiniPCIe card socket Memory The EPX C380 board supports up to 2 GB DDR2 SODIMM system memory via an on board socket located at J500 Bus Expansion PC 104 Plus MiniPCIe MiniPCIe not applicable for model EPX C380 S1 0 Industrial Oper...

Page 15: ...8F Internal LPC 0A0 0BF 8259 Slave 0F0 0FF Math Co processor 100 11F Free 120 12F Digital I O 130 14F Free 150 Reserved for on board configuration 151 16F Free 170 177 PATA 178 1CF Free 1D0 1DF Legacy Watchdog 1D0 Enabled 1D8 Pet 1E8 1EB Reserved for on board configuration 1EC Interrupt Status Register 1ED Status LED 1EE 1EF Watchdog Timer Control 1F0 1FF PATA 200 2AF Free 2B0 2DF Video Controller...

Page 16: ...served IRQs when allocating resources during the boot process The table below lists IRQ resources as used by the EPX C380 IRQ0 18 2 Hz heartbeat IRQ1 Keyboard IRQ2 Chained to Slave controller IRQ9 IRQ3 COM2 IRQ4 COM1 IRQ5 COM3 IRQ6 COM4 IRQ7 LPT IRQ8 Real Time Clock IRQ9 FREE IRQ10 Digital I O IRQ11 PCIe Interrupts IRQ12 Mouse IRQ13 Floating point processor IRQ14 IDE IRQ15 PCIe Interrupts These IR...

Page 17: ...s 565h and 566h The watchdog is enabled by writing a timeout value other than zero to the I O address 566h and disabled by writing 00h to this I O address The watchdog timer is serviced by writing the desired timeout value to I O port 566h If the watchdog has not been serviced within the allotted time the circuit resets the CPU The timeout value can be set from 1 second to 255 minutes If port 565h...

Page 18: ...upports a number of features including periodic and alarm interrupt capabilities In addition to the time and date keeping functions the system configuration is kept in CMOS RAM contained within the clock section A battery must be enabled for the real time clock to retain time and date during a power down P r e l i m i n a r y ...

Page 19: ...105 Housing MOLEX 39 00 0039 Crimp 9 6 7 8 1 2 3 4 5 1 0 G N D 1 2 V 5 V 5 V 5 V S B 3 3 V 1 2 V G N D G N D P S O N only connects to the PC 104 Plus connector J8 ATX Signals Visual Index PCB Connector MOLEX 22 11 2042 J8 Mating Connector MOLEX 22 01 3047 Housing MOLEX 08 55 0101 Crimp J8 1 2 3 4 RESET GND PWRBTN PWRGOOD ATX signals for the power button reset and power good are provided at J8 WinS...

Page 20: ... signal provides the standby voltage to the EPX C380 but does not power any other features of the board When the power button is pressed the EPX C380 pulls PSON Power Supply On low and the power supply turns on all voltages to the single board computer When the power button is pressed again the BIOS signals the event so ACPI compliant operating systems can be shutdown before the power is turned of...

Page 21: ...andby voltage to the circuits selected for backup The battery automatically switches ON when the VCC of the systems drops below the battery voltage and back OFF again when VCC returns to normal WARNING BAT LTC E 36 16 2 or BAT LTC E 36 27 2 must be connected at J4 Improper installation of the battery could result in explosive failure Please be careful to note correct connection at location J4 For ...

Page 22: ...GA Visual Index PCB Connector MOLEX 501568 1407 J1 Mating Connector MOLEX 501330 1400 Housing MOLEX 501334 0000 Crimp RED GND GREEN GND BLUE GND HSYNC GND VSYNC GND SDA GND SCL VCC J1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 CBL VGA 002 12 P r e l i m i n a r y ...

Page 23: ...SWVDD D2 NC SWVDD CLK DDC_CLK DDC_DATA SWVDD NC NC SWVDD NC NC SWVDD NC NC NC GND D0 D1 GND D2 NC GND CLK GND GND GND NC NC GND NC NC GND NC GND GND J7 HAZARD WARNING LCD panels can require a high voltage for the panel backlight This high frequency voltage can exceed 1000 volts and can present a shock hazard Care should be taken when wiring and handling the inverter output To avoid the danger of s...

Page 24: ... interface connector is located at J7 to interface to flat panels A backlight power connectors is located at J5 Panel power option selection is made at JP1 Contact your WinSystems Applications Engineer for information about available cable kits and supported panels This manual does not attempt to provide any information about how to connect to specific LCDs Avoid Simultaneous Jumpering of pins 1 2...

Page 25: ...BL AUDIO7 102 12 provides full 7 1 audio support A simplified cable CBL AUDIO2 102 12 provides basic Line In Line Out and Microphone audio support and CBL AUDIO5 102 12 provides 5 1 audio support 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 ADGND ADGND ADGND CD GND CD L CD R ADGND LINE L LINE R ADGND MIC2 REAR L MIC2 REAR R ADGND MIC1 REAR L MIC1 REAR R ADGND HE...

Page 26: ...6 SP1 Speaker Speaker An on board speaker SP1 is available for sound generation Beep Codes Reference the chart Appendix B section of this manual for the appropriate beep codes CBL AUDIO2 102 12 CBL AUDIO5 102 12 P r e l i m i n a r y ...

Page 27: ...s The RS 232 has a charge pump to generate the plus and minus voltages so the EPX C380 only requires 5V to operate An independent software programmable baud rate generator is selectable from 50 through 115 2 kbps Individual modem handshake control signals are supported for all ports 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 DCD C...

Page 28: ...t and or receive termination and biasing resistor s An 8 pin configuration jumper is provided for each port COM1 JP5 COM3 JP7 COM2 JP6 COM4 JP8 Termination Resistors 2 4 6 8 1 3 5 7 RS 422 Termination and Biasing Resistors TX 100 Places a 100Ω Resistor across the TX TX pair 3 4 RX 100 Places a 100Ω Resistor across the RX RX pair 7 8 TX 300 Places a 100Ω Resistor from 5V to TX 1 2 Places a 100Ω Res...

Page 29: ... PCB Connector MOLEX 501571 2007 J9 J11 Mating Connector MOLEX 501189 2010 Housing MOLEX 501193 2000 Crimp J11 USB 0 1 2 3 J9 USB 4 5 6 7 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 USBPWR0 D0 D0 GND GND GND USBPWR2 D2 D2 GND USBPWR1 D1 D1 GND GND GND USBPWR3 D3 D3 GND 1 3 5 7 9 11 13 15 17 19 2 4 6 8 10 12 14 16 18 20 USBPWR4 D4 D4 GND GND GND USBPWR6 D6 D6 GND USBPWR5 D5 D5 GND GND GND US...

Page 30: ... where the environment is too harsh for mechanical hard disks The CompactFlash socket at J501 supports modules with TrueIDE support WinSystems offers industrial grade CompactFlash modules that provide high performance and extended temperature operation 40ºC to 85ºC An activity LED is present at D511 J501 CompactFlash Visual Index PCB Connector MOLEX 67490 1220 J13 J16 CompactFlash Master default 1...

Page 31: ...o 0 OFFSET 0 MSB Address Register D7 A23 of access address D6 A22 of access address D5 A21 of access address D4 A20 of access address D3 A19 of access address D2 A18 of access address D1 A17 of access address D0 A16 of access address OFFSET 1 NSB Address Register D7 A15 of access address D6 A14 of access address D5 A13 of access address D4 A12 of access address D3 A11 of access address D2 A10 of a...

Page 32: ... desired The byte written or read will still be specified by the 24 bit combination of the MSB register the NSB register and the LSB counter However the LSB counter will not be altered following the access It will then be necessary to do one more read from Data Access Register A in order to bump the address to the next byte This write only register controls the write protect function of the 1 MB S...

Page 33: ...ler Since the on board Flash disk may co exist with a CompactFlash device it can be set as Master by installing a jumper at JP3 pins 3 4 or Slave when the JP3 pins 3 and 4 are open A jumper at JP5 5 6 protects the on board Flash disk When JP5 pins 5 and 6 are open read write access is available to the on board Flash disk Please contact an Applications Engineer if you are interested in this optiona...

Page 34: ...available off board for enclosures or other applications that have remote mounting requirements The activity signals for Port 1 are provided at connector J25 The signals for Port 2 are provided at J26 See tables below for signal and pin definitions J21 Ethernet Visual Index PCB Connector MOLEX 502046 2070 J11 Mating Connector MOLEX 503110 2000 Housing MOLEX 501930 1100 Crimp J21 1 3 5 7 9 11 13 15...

Page 35: ...14 GREEN STATUS D14 Status LED Visual Index J26 Ethernet Port 1 Pin LED Color Signal 1 D518 RED ACTIVITY 2 D519 YELLOW SPEED100 3 D520 GREEN SPEED1000 4 3V J25 Ethernet Port 2 Pin LED Color Signal 1 D515 RED ACTIVITY 2 D516 YELLOW SPEED100 3 D517 GREEN SPEED1000 4 3VSB PCB Connector MOLEX 5019530407 J25 J26 Mating Connector MOLEX 5019390400 Housing MOLEX 501334 0100 or 501334 0000 Crimp J25 J26 Et...

Page 36: ...3 Port 2 Bit 2 Port 2 Bit 1 Port 2 Bit 0 Port 1 Bit 7 Port 1 Bit 6 Port 1 Bit 5 Port 1 Bit 4 Port 1 Bit 3 Port 1 Bit 2 Port 1 Bit 1 Port 1 Bit 0 Port 0 Bit 7 Port 0 Bit 6 Port 0 Bit 5 Port 0 Bit 4 Port 0 Bit 3 Port 0 Bit 2 Port 0 Bit 1 Port 0 Bit 0 3 3V 5V GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32...

Page 37: ... Each I O bit in each of the six ports can be individually programmed for input or output Writing a 0 to a bit position causes the corresponding output pin to go to a high impedance state pulled high by external 10 KΩ resistors This allows it to be used as an input When used in the input mode a read reflects the inverted state of the I O pin such that a high on the pin will read as a 0 in the regi...

Page 38: ...upts When set to a 1 the edge detection interrupt is enabled for the corresponding port and bit When cleared to 0 the bit s edge detection interrupt is disabled Note that this register can be used to individually clear a pending interrupt by disabling and re enabling the pending interrupt INT_ID0 INT_ID2 These registers are accessible when Page 3 is selected They are used to identify currently pen...

Page 39: ...5 D16 D17 D18 D19 C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 GND MEMCS16 IOCS16 IRQ10 IRQ11 IRQ12 IRQ15 IRQ14 DACK0 DRQ0 DACK5 DRQ5 DACK6 DRQ6 DACK7 DRQ7 5V MASTER GND GND GND SBHE LA23 LA22 LA21 LA20 LA19 LA18 LA17 MEMR MEMW SD8 SB9 SD10 SD11 SD12 SD13 SD14 SD15 KEY A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 A22 A23 A24 A25 A26 A27 A28 A2...

Page 40: ...RESERVED 5V AD00 2 VI O AD02 AD01 5V 3 AD05 GND AD04 AD03 4 C BE0 AD007 GND AD06 5 GND AD009 AD08 GND 6 AD11 VI O AD10 M66EN 7 AD14 AD13 GND AD12 8 3 3V C BE1 AD15 3 3V 9 SERR GND RESERVED PAR 10 GND PERR 3 3V RESERVED 11 STOP 3 3V LOCK GND 12 3 3V TRDY GND DEVSEL 13 FRAME GND IRDY 3 3V 14 GND AD16 3 3V C BE2 15 AD18 3 3V AD17 GND 16 AD21 AD20 GND AD19 17 3 3V AD23 AD22 3 3V 18 IDSEL0 GND IDSEL1 I...

Page 41: ...A 9 GND 12 UIM_CLK 11 REFCLK 14 UIM_RESET 13 REFCLK 16 UIM_VPP 15 GND Mechanical Key 18 GND 17 Reserved UIM_C8 20 W_DISABLE 19 Reserved UIM_C4 22 PERST 21 GND 24 3 3Vaux 23 PERn0 26 GND 25 PERp0 28 1 5V 27 GND 30 SMB_CLK 29 GND 32 SMB_DATA 31 PETn0 34 GND 33 PETp0 36 USB_D 35 GND 38 USB_D 37 GND 40 GND 39 3 3Vaux 42 LED_WWAN 41 3 3Vaux 44 LED_WLAN 43 GND 46 LED_WPAN 45 Reserved 48 1 5V 47 Reserved...

Page 42: ... information is via the Setup Utility in the BIOS Entering Setup To enter setup power up the computer and press F2 when either the splash screen is displayed or when the Press F2 for Setup message is displayed It may take a few seconds before the main setup menu screen is displayed Navigation of the Menus Use the Up and Down arrow keys to move among the selections and press Enter when a selection ...

Page 43: ...2010 IDE Primary Master None IDE Primary Slave None SATA Port 1 None SATA Port 2 None System Memory 633 KB Extended Memory 2085888 KB Ethernet MAC Address 1 xx xx xx xx xx xx Ethernet MAC Address 2 xx xx xx xx xx xx CPU Temperature 50 C 132 F Ambient Temperature 40 C 104 F Note Defaults are indicated in bold for BIOS properties Default options that cannot be user modified are indicated with grey t...

Page 44: ... Options Disabled Enabled Transfer Mode Standard Ultra DMA Mode Disabled SMART Monitoring Disabled Note Defaults are indicated in bold for BIOS properties Default options that cannot be user modified are indicated with grey text Depending on the Primary Master Type various Primary Master options will be available See the following screens P r e l i m i n a r y ...

Page 45: ...tions Disabled Enabled Transfer Mode Standard Ultra DMA Mode Disabled SMART Monitoring Disabled Note Defaults are indicated in bold for BIOS properties Default options that cannot be user modified are indicated with grey text Depending on the Primary Master Type various Primary Master options will be available See the following screens P r e l i m i n a r y ...

Page 46: ... Other DOS Summary screen Disabled Options Disabled Enabled Boot time Diagnostic Screen Enabled Options Disabled Enabled QuickBoot Mode Enabled Options Disabled Enabled Extended Memory Testing None Options Normal Just zero it None Note Defaults are indicated in bold for BIOS properties Default options that cannot be user modified are indicated with grey text P r e l i m i n a r y ...

Page 47: ...enu Video Intel IGD Control Sub Menu ICH Control Sub Menu Super I O Control Sub Menu ACPI Control Sub Menu Note Defaults are indicated in bold for BIOS properties Default options that cannot be user modified are indicated with grey text P r e l i m i n a r y ...

Page 48: ...PU Control Sub Menu Hyperthreading Enabled Options Disabled Enabled Processor Power Management Enabled Options Disabled GV3 Only C States Only Enabled Enhanced C States Enable Enabled Options Disabled Enabled Timestamp Counter Updates Enabled Options Disabled Enabled CPU Thermal Control Sub Menu Set Max Ext CPUID 3 Disabled Options Disabled Enabled P r e l i m i n a r y ...

Page 49: ...led Options Disabled TM1 TM2 TM1 and TM2 DTS Enable Disabled Options Disabled Enabled Active Trip Point 55 C Options Disabled 55 C 63 C 71 C 79 C 87 C 95 C 103 C 111 C 119 C Passive Cooling Trip Point 95 C Options Disabled 55 C 63 C 71 C 79 C 87 C 95 C 103 C 111 C 119 C Passive TC1 Value 1 Passive TC2 Value 5 Options 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 More CPU Thermal Control Sub Menu options a...

Page 50: ...ser modified are indicated with grey text Intel CPU Control Sub Menu CPU Thermal Control Sub Menu continued Passive TSP Value 10 Options 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 Critical Trip Point POR Options POR 15 C 23 C 31 C 39 C 47 C 55 C 63 C 71 C 79 C 87 C 95 C 103 C 111 C 119 C 127 C P r e l i m i n a r y ...

Page 51: ...IOS properties Default options that cannot be user modified are indicated with grey text Intel Video Intel IGD Control Sub Menu IGD VBIOS Boot Type CRT Options VBT Default CRT LFP CRT LFP IGD LCD Control Sub Menu DVMT 4 0 Mode Auto Options Fixed DVMT Auto P r e l i m i n a r y ...

Page 52: ...LVDS 3 1024x768 LVDS 4 1280x1024 LVDS 5 1400x1050LVDS1 6 1400x1050 LVDS2 7 1600x1200 LVDS 8 1280x768 LVDS 9 1680x1050 LVDS 10 1920x1200 LVDS 11 Reserved 12 Reserved 13 Reserved 14 1280X800 LVDS 15 1280X600 LVDS 16 Reserved IGD Panel Scaling Auto Options Auto Force Scaling Off GMCH BLC Control GMBus Options Disabled PWM GMBus BIA Control Disabled Options Automatic Disabled Level 1 Level 2 Level 3 L...

Page 53: ...ified are indicated with grey text Intel ICH Control Sub Menu Integrated Device Control Sub Menu Serial IRQ Quiet Mode Enabled Options Disabled Enabled Pop Up Mode Enable Enabled Options Disabled Enabled Pop Down Mode Enable Enabled Options Disabled Enabled LPC Decode Range 500 5FFh Options 500 5FFh 1E0 1EFh P r e l i m i n a r y ...

Page 54: ...ntrol Sub Menu Integrated Device Control Sub Menu PCI Express Control Sub Menu ICH USB Control Sub Menu Azalia Device 27 Function 0 Auto Options Disabled Auto AHCI Configuration Disabled Options Disabled Enabled Disable Vacant Ports Disabled Options Disabled Enabled On board LAN Enabled Options Disabled Enabled PXE OPROM Disabled Options Disabled Enabled P r e l i m i n a r y ...

Page 55: ...ntel ICH Control Sub Menu Integrated Device Control Sub Menu PCI Express Control Sub Menu PCI Express Root Port 1 Enabled Options Disabled Enabled Auto PCI Express Root Port 2 Auto Options Disabled Enabled Auto Root Port ASPM Support Auto Options Disabled Auto ASPM Latency Checking Auto Options Disabled Auto PCI PNP ISA IRQ Resource Exclusion P r e l i m i n a r y ...

Page 56: ...l Sub Menu PCI Express Control Sub Menu PCI PNP ISA IRQResource Exclusion IRQ 3 Available Options Available Reserved IRQ 4 Available Options Available Reserved IRQ 5 Available Options Available Reserved IRQ 7 Available Options Disabled Auto IRQ 9 Available Options Disabled Auto IRQ 10 Available Options Disabled Auto IRQ 11 Available Options Disabled Auto IRQ 15 Available Options Disabled Auto P r ...

Page 57: ...ified are indicated with grey text Intel ICH Control Sub Menu Integrated Device Control Sub Menu ICH USB Control Sub Menu USB Dev 29 Fun 0 1 2 7 Options Disabled Fun 0 Fun 0 1 Fun 0 1 2 Fun 0 1 2 7 USB Dev 26 Fun 0 1 7 Options Disabled Fun 0 7 Fun 0 1 7 Overcurrent Detection Enabled Options Disabled Enabled P r e l i m i n a r y ...

Page 58: ...rt x Disabled Enabled Speed Low High Base I O address 3F8 2F8 3E8 2E8 Interrupt Disabled IRQ 3 IRQ 4 IRQ 5 IRQ 6 IRQ 7 IRQ 9 Interface RS232 RS422 RTS RS422 Auto RS485 RTS RS485 RTS w Echo RS485 Auto RS485 Auto w Echo Serial port 3 Enabled Speed Low Base I O address 3E8 Interrupt IRQ 5 Interface RS232 Options Port x Disabled Enabled Speed Low High Base I O address 3F8 2F8 3E8 2E8 Interrupt Disable...

Page 59: ...nabled Base I O address 378 Interrupt IRQ 7 Options Port x Disabled Enabled Base I O address 378 278 Interrupt Disabled IRQ 3 IRQ 4 IRQ 5 IRQ 6 IRQ 7 IRQ 9 IRQ 10 IRQ12 Digital I O port Enabled DIO port address 120 DIO IRQ IRQ 10 Options Digital I O port Disabled Enabled DIO port address 120 130 140 DIO IRQ Disabled IRQ 3 IRQ 4 IRQ 5 IRQ 6 IRQ 7 IRQ 9 IRQ 10 IRQ12 Watchdog 0 Options Enter any valu...

Page 60: ... Menu Passive Cooling Trip Point 55 C Options Disabled 55 C 63 C 71 C 79 C 87 C 95 C 103 C 111 C 119 C Passive Cooling Trip Point 95 C Options Disabled 55 C 63 C 71 C 79 C 87 C 95 C 103 C 111 C 119 C Passive TC1 Value 1 Passive TC2 Value 5 Options 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Passive TSP Value 10 Options 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 P r e l i m i n a r y ...

Page 61: ...with grey text Intel ACPI Control Sub Menu continued Critical Trip Point POR Options POR 15 C 23 C 31 C 39 C 47 C 55 C 63 C 71 C 79 C 87 C 95 C 103 C 111 C 119 C 127 C FACP RTC S4 Flag Value Enabled Options Disabled Enabled FACP PM Timer Flag Value Enabled Options Disabled Enabled HPET Support Disabled Options Disabled Enabled P r e l i m i n a r y ...

Page 62: ...t cannot be user modified are indicated with grey text Security Supervisor Password Is Clear User Password Is Clear Set Supervisor Password Enter Set User Password Enter Virus check reminder Disabled Options Disabled Daily Weekly Monthly Password on boot Disabled Options Disabled Enabled P r e l i m i n a r y ...

Page 63: ...ons All IDE HDD All USB Floppy All USB Key All USB HDD All USB CDROM All USB ZIP All USB LS120 All PCI SCSI All PCI BEV Legacy Network Card Bootable Add in Cards Note Defaults are indicated in bold for BIOS properties Default options that cannot be user modified are indicated with grey text P r e l i m i n a r y ...

Page 64: ...xit Saving Changes to CMOS and EEPROM Exit Discarding Changes Load Setup Defaults Discard Changes Save Changes Note Defaults are indicated in bold for BIOS properties Default options that cannot be user modified are indicated with grey text P r e l i m i n a r y ...

Page 65: ...MOS settings will be restored from EEPROM but time and date information will be lost and returned to default values At system boot the BIOS first performs a checksum validation on the contents of the CMOS RAM Invalid checksums usually occur due to a low or disabled battery If the checksum is valid the system boots using values stored in CMOS RAM If a checksum error occurs the BIOS attempts to load...

Page 66: ...Turn the system on and enter the BIOS Main Menu using the F2 key 4 Select Load Defaults from the Exit menu 5 Install the jumper on pins 7 8 on JP4 6 Save the restored defaults to CMOS and EEPROM Updating the BIOS FLASH PROM The most recent EPX C380 BIOS is available on the WinSystems website However it is highly recommended that an Applications Engineer be consulted prior to any BIOS FLASH PROM up...

Page 67: ...erminated Pico Clasp CBL DIO24 001 12 DIO 2x25 1 mm to 2x25 1 mm 12 CBL DIO24 002 12 DIO Cable 2x25 1 mm to 2x25 1 CNTRS 12 CBL ENET2 001 12 Ethernet 2x10 1 25 mm to 2x10 1 25 mm 12 CBL ENET2 002 12 Ethernet 2x10 1 25 mm to 2 x RJ 45 Female Jack 12 CBL ENET2 003 12 Ethernet 2x10 1 25 mm to 2 x RJ 45 Males Plug 12 CBL ENET2 004 12 Ethernet 2X10 1 25 mm to 2EA 2x6 2 mm 12 CBL LED3 000 14 LED Etherne...

Page 68: ...io Driver Windows XP Intel Intel zip Windows XP VIA v650a zip Linux Gigabit Ethernet Driver Windows XP Pro2KXP_v14_0 zip Windows 7 Linux WS16C48 Digital I O Driver DOS Windows XP wsuio48_96xp zip Windows 7 Linux Watchdog Timer Driver Windows XP WSWDTXP zip Windows 7 SSD Driver Universal Solid State Disk Driver USSD SYS P r e l i m i n a r y ...

Page 69: ...cal VCC 5V 5 required MODEL N450 1 66 GHz MODEL D510 1 66 GHz Peak A Peak A Typical A Typical A Suspend A Suspend A Mechanical Dimensions 4 50 x 6 50 115 mm x 165 mm Weight 99 9 oz 999 g Environmental Operating Temperature 40 C to 70 C P r e l i m i n a r y ...

Page 70: ... 5 587 5 596 5 802 6 096 6 246 200 624 1 300 1 830 1 967 2 596 2 920 5 496 5 841 6 096 6 296 200 333 1 726 2 243 2 762 3 073 3 613 3 776 4 128 4 328 2 402 308 823 1 338 1 450 2 225 4 428 3 375 3 392 4 128 4 278 165 WINSYSTEM EPX ATOMLP TOP VIEW MECHANICAL DIMENSIONS ARE IN INCHES AND FOR REFERENCES ONLY P r e l i m i n a r y ...

Page 71: ...u should always measure it at the power connector on the SBC Measuring at the power supply does not account for voltage drop through the wire and connectors The single board computer requires 5V 5 to operate Verify the power connections Incorrect voltages can cause catastrophic damage Populate all of the 5V and ground connections Most single board computers will have multiple power and ground pins...

Page 72: ...or any I O cards Connecting hot signals can cause damage whether the single board computer is powered or not MOUNTING AND PROTECTING THE SINGLE BOARD COMPUTER Do Not Bend or Flex the SBC Never bend or flex the single board computer Bending or flexing can cause irreparable damage Single board computers are especially sensitive to flexing or bending around Ball Grid Array BGA devices BGA devices are...

Page 73: ...ause component damage on the bottom of the single board computer Avoid Conductive Surfaces Never allow the single board computer to be placed on a conductive surface Almost all single board computers use a battery to backup the clock calendar and CMOS memory A conductive surface such as a metal bench can short the battery causing premature failure ADDING PC 104 BOARDS TO YOUR STACK Be careful when...

Page 74: ...sions Check Pinouts Always check the pinout and connector locations in the manual before plugging in a cable Many single board computers will have identical headers for different functions and plugging a cable into the wrong header can have disastrous results Contact an Applications Engineer with questions If a diagram or chart in a manual does not seem to match your board or if you have additiona...

Page 75: ...gister initialization 12h Restore CR0 13h PCI bus master reset 14h 8742 initialization keyboard embedded controller 16h 1 2 2 3 Checksum BIOS ROM 17h Pre size RAM initialize cache before memory auto size 18h Timer initialization 8254 CTC 1Ah DMA initialization 8237 DMAC 1Ch Reset PIC 8259 PIC 20h 1 3 1 1 Test DRAM refresh 22h 1 3 1 3 Test 8742 Keyboard Controller 24h Set huge ES segment register t...

Page 76: ...ideo BIOS 4Eh Copyright display 4Fh MultiBoot XP initialization 50h CPU type display 51h EISA initialization 52h Keyboard test 54h Set key click if enabled 55h USB initialization 56h Enabled keyboard 57h 1394 Firewire initialization 58h 2 2 3 1 HOT Test for unexpected interrupts 59h POST display service PDS initialization 5Ah Display prompt Press F2 to enter SETUP 5Bh CPU cache off 5Ch Test RAM be...

Page 77: ...ded Data Area EBDA 8Bh Mouse initialization 8Ch Floppy initialization 8Fh FDISK fast pre initialization 90h FDISK initialization 91h FDISK fast initialization 92h Jump to UserPatch2 93h Build MPTABLE for multi processor boards 95h CDROM initialization 96h Clear huge ES 97h MultiProcessor table fix up 98h 1 2 Option ROM scan 99h FDISK check SMART 9Ah Miscellaneous shadow shadow option ROMs 9Bh PM C...

Page 78: ...C7h Initialize note dock late C8h Force check C9h Extended checksum Embedded Extensions Code Description CAh TP_SERIAL_KEY Redirect INT15h to serial keyboard CBh TP_ROMRAM Redirect INT13h to Memory Technologies Devices Such as ROM RAM PCMCIA and serial disk CCh TP_SERIAL_VID Redirect INT10h to enable remote serial video CDh TP_PCMATA Re map I O and memory for PCMCIA CEh TP_PEN_INIT Initialize digi...

Page 79: ..._RTC_INIT Init RTC 93h TP_BB_VIDEO_INIT Init Video 94h TP_BB_OUT_INIT Init Beeper 95h TP_BB_BOOT_INIT Init Boot 96h TP_BB_CLEAR_HUGE Clear Huge Seg 97h TP_BB_BOOT_OS Boot to OS 98h TP_BB_USB_INIT Intialize the USB Controller 99h TP_BB_SECUR_INIT Init Security If the BIOS detects error 2C 2E or 30 base 512 KB RAM error it displays an additional word bitmap xxxx indicating the address line or bits t...

Page 80: ...ced Products or Software thereafter delivered to Customer within the United States All fees and costs for shipment outside of the United States shall be paid by Customer The foregoing warranty shall not apply to any Products of Software which have been subject to abuse misuse vandalism accidents alteration neglect unauthorized repair or improper installations THERE ARE NO WARRANTIES BY WINSYSTEMS ...

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