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1.3inch OLED User Manual 

 

 

Rev 2.4, May 15

th

 2015 

share awesome hardware

1.3inch  OLED 

User  Manual 

1.

 

Key Parameters  

Table 1: Key Parameters 

Driver Chip 

SH1106 

Interface 

3-wire SPI

4-wire SPI

I2C 

Resolution 

128*64 

Display Size 

1.3 inch 

Dimension 

29mm*33mm 

Colors 

Yellow, Blue 

Visible Angle 

>160° 

Operating Temp. (

-20

~70

 

Storage Temp. (

-30

~80

 

2.

 

Operation Description 

We will illustrate the usage of the module with an example of 4-wire SPI mode (default working mode) 

by connecting Waveshare Open103R development board (STM32F103R MCU on board). 

2.1.

 

Hardwar e configuration  

This module provides 3 kinds of driver interfaces; they are 3-wire SPI, 4-wire SPI and I2C interface. In 

its factory settings, BS0/BS1 pins are set to 0/0 and 4-wire SPI is selected as default. 

Different working mode and pin function of the module can be set by hardware selection on BS0/BS1 

pins. (Notice: In this operation, welding is required. Any changes under no guidance from Waveshare 

will be considered as a waiver of warranty). 

Table 2: Working mode setting 

name 

mode 

BS1/BS0  CS  D/C  DIN 

CLK 

3-wire SPI  0/1 

CS  0 

MOSI  SCLK 

4-wire SPI  0/0 

CS  D/C 

I2C 

1/0 

0/1  SDA 

SCL 

Summary of Contents for 10451

Page 1: ...nnecting Waveshare Open103R development board STM32F103R MCU on board 2 1 Hardware configuration This module provides 3 kinds of driver interfaces they are 3 wire SPI 4 wire SPI and I2C interface In i...

Page 2: ...define INTERFACE_3WIRE_SPI 3 wire SPI define INTERFACE_4WIRE_SPI 4 wire SPI define INTERFACE_IIC I2C After compiling successfully download the project to Open103R development board Note You should del...

Page 3: ...driver interfaces settling 3 wire SPI 4 wire SPI and I2C the IM2 pin is set to 1 by hardware BS0 BS1 correspond to IM0 IM1 respectively We introduce 4 wire SPI and I2C interfaces here Please read SH1...

Page 4: ...ace mode Caution is required on the SCL signal when it comes to line end reflections and external noise We recommend the operation be rechecked on the actual equipment 3 2 I2C bus Interface The SH1106...

Page 5: ...t equal to the value of VDD1 Bit Transfer One data bit is transferred during each clock pulse The data on the SDA line must remain stable during the HIGH period of the clock pulse as changes in the da...

Page 6: ...ull down the SDA line during the acknowledge clock pulse so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse set up and hold times must be taken into consi...

Page 7: ...a command or as RAM data The control and data bytes are also acknowledged by all addressed slaves on the bus After the last control byte depending on the D C bit setting either a series of display da...

Page 8: ...2A WPP3N00000 OLED 100H016A WPP5N00000 OLED 100H016H GPP5N00000 OLED 016O002B BPP5N00000 OLED 096Y064A LPP3N00000 OLED 096O064A BPP3N00000 OLED 128Y064C LPP3N00000 OLED 096Y064B LPP3N00000 OLED 128Y03...

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