Watec WAT-910BD Hardware Manual Download Page 18

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WAT-910BD H/W MANUAL

(3)Output Timing for Digital Data

The effective image data is outputs the Luminance Data and Color Difference Data in Y/Cb/Cr=4:2:2 format.

(The output sequence is repeated in the Cb,Y,Cr,Y,… sequence)

Since the WAT-910BD is a monochrome camera, the Cb,Cr data are all 80[h].

The Horizontal Blanking Period (without TRC Code) is Cb,Cr=80[h], Y=10[h], repeated output.

The TRC Code, which is used to set the Efective Pixel Period, is output with every horizontal line.

The TRC Code complies with the ITU-R BT.656 standard, and output the 4 Byte Codes below.

ＳＡＶ： Start of Active Video [hex]

ＥＡＶ： End of Active Video [hex]

The 4th Byte of the TRC code (XX) is output according to the Figure below.

*NOTE:

F=0 : during field 1

F=1 : during field 2

V=0 : elsewhere

V=1 : during field blanking

H=0 : in SAV

H=1 : in EAV

P0-P3 : protection bits

Fig.5-11(EIA)/Fig.5-12(CCIR) shows the output timing for 1 line worth of digital data.

Fig.5-13(EIA)/Fig.5-14(CCIR) shows the output timing for 1 frame worth of digital data.

CODE

[hex]

EVEN Field H Blanking(EAV)

bit0

bit7

bit6

bit5

bit4

bit3

ODD Field V Blanking(SAV)

EVEN Field V Blanking(SAV)

EVEN Field V Blanking(EAV)

ODD Field H Blanking(SAV)

ODD Field H Blanking(EAV)

ODD Field V Blanking(EAV)

EVEN Field H Blanking(SAV)

(Fig.5-10) TRC(Timing Reference Code)

(Fix)

bit2

bit1

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Summary of Contents for WAT-910BD

Page 1: ...WAT 910BD H W MANUAL Ver 1 10 Jul 01 2016 WAT 910BD Watec Co Ltd H W MANUAL ...

Page 2: ...irst edition correct P 34 MANUAL GAIN bit range correct P 34 HSBLC WINDOW H V SIZE address correct P 41 BPC LEVEL bit range Fix fine typos 1 01 2013 12 25 1 00 2013 11 06 1 02 2014 10 23 i The page configuration of the English manual was fit to the Japanese manual The factory default values were appended to 6 4 CAMERA PARAMETER P 16 19 add H V blanking timing to line data ...

Page 3: ...S LENS CONTROL 4 5 GPIO MOTION DETECT 4 6 OSD CONTROL 5 DIGITAL VIDEO OUT 5 1 ELECTRICAL CHARACTERISTICS 5 2 DIGITAL OUTPUT FORMAT 6 SPI COMMUNICATION 6 1 ELECTRICAL CHARACTERISTICS 6 2 CTL COMMAND PROTOCOL 6 3 CAMERA CTL COMMAND 6 4 CAMERA PARAMETER 6 5 SAMPLE CODE 7 SPECIFICATIONS 8 DIMENSIONS Contents 5 12 14 6 7 1 1 1 2 22 23 8 9 10 11 ii 61 62 28 31 35 50 ...

Page 4: ...r otherwise under any intellectual property right or other right of Watec or third parties Watec does not assume responsibility for any right infringements arising out of the use of this information WAT 910BD is an ultra high sensitivity B W board camera equipped with 1 2 format CCD By adopting the latest high sensitivity CCD and DSP with a variety of functions to the signal processing unit WAT 91...

Page 5: ...ect correctly Name Parts shape Fig 4 2 DC IRIS LENS adjustment VR Description 4 DESCRIPTION OF PARTS Fig 4 1 Location of functional connectors VR1 Adjustment VR for DC IRIS Lens clockwise DC iris Lens toward to open counterclockwise DC iris Lens toward to close This adjustment is working only J3 output close J3 J4 J1 J7 J8 J5 J6 J2 VR1 open 2 ...

Page 6: ... 4 DATA 3 GND common CLOCK GND common Vertical Blanking Horizontal Blanking J6 Digital Video Output BM14B SRSS DATA 5 reserved J5 GPIO JST MOTION DETECT output BM03B SRSS J3 NC Non Conection Drive Vcc DC 12V OUT molex molex J4 VIDEO IRIS CTL 53047 0410 DC IRIS CTL BM02B SRSS 53047 0410 IRIS OUT JST VIDEO GND COMMON Sense Sense Drive power GND COMMON O GND J2 VIDEO OUT VIDEO OUTPUT Parts No manufac...

Page 7: ...D H W MANUAL Fig 4 3 Connector Pin Function continued Parts Shape Name Parts No Pin No manufacturer GND I O Description I I I I I UP DOWN BM06B GHS TBT GND COMMON RIGHT LEFT JST SET J8 OSD CTL 5key interface 4 ...

Page 8: ...SD menu RESET 2 Using a manual iris lens the lens iris is fully closed The power consumption of the camera and efficiency depend on the supply voltage Under the above conditions the measurement values of the power consumption and current consumption related to the supply voltage are shown in following table Please note the following points in the selection and design of the power supply used When ...

Page 9: ...nalog video output terminal of 75 ohm impedance 75 ohm termination is needed in the video signal receiver equipment Description VIDEO GND COMMON Fig 4 6 VIDEO output Parts Shape Pin No Pin Name VIDEO OUTPUT J2 75 ohm impedance J2 VIDEO OUTPUT 6 ...

Page 10: ... Turn off SENSE UP function STEP3 Turn off AGC function Set GAIN to the minimum value 6dB by using MANUAL GAIN menu STEP4 Return to the EXPOSURE menu by adjusting the VR1 set the proper lens iris STEP5 If the adjustment of lens iris is correct when AGC is switched to LOW from OFF the video signal will be a little brighter STEP5 When switching to AGC LOW from OFF and the video screen is to be sligh...

Page 11: ...nce as following 2 Adjustment method of the lens iris How to adjust the lens iris is the same as the DC iris lens but location and function of the adjustment VR is different by each lens used About the adjustment VR location and function please refer to the instruction manual of the lens 3 Fig 4 6 Pin configuration of VIDEO IRIS connector 3 4 IRIS OUT GND COMMON 1 J4 2 4 Pin Name Vcc DC 12V OUT 2 ...

Page 12: ...l Pin Name OSD SETTING Motion detecting message Fig 4 7 Pin configuration of GPIO MOTION DETECT connector Output High Voltage Voh 2 4 Parameter Symbol Remarks Typ Max Parts Shape Pin No Description Output Time T 2 S J5 reserved Ioh 1mA Fig 4 8 Electrical Characteristic Table MOTION DETECT output V MOTION DETECT output voltage is changed to H level When detecting a motion output GND common CAMERA G...

Page 13: ...sistors inside of the camera To move cursor and or select a item on OSD input the L pulse in each terminals by touching with the GND terminal Latch SET Pin Name Parts Shape Pin No GND COMMON Repeat J8 RIGHT DOWN UP Repeat input While each pin is held in the L state DSP will repeat the latch operation Description LEFT L active Fig 4 9 Connector Pin Function J8 OSD CTL 5key interface 10 ...

Page 14: ... the OSD Manual 2 Operation through SPI Communication By using the SPI communication it is possible to switch the Digital Video Output ON OFF without going through the OSD menu Please refer to section 6 SPI Communication on how to communicate via SPI and details on the parameter addresses 3 Digital Video Output Connector The figure below shows the location of the Digital Video Output Connector J6 ...

Page 15: ...diagram are shown below Parts No J6 Digital Video Output Digital Clock DCK Fig 5 3 Pin Function Descreptions O Vertical Blanking Horizontal Blanking description Parts shape GND common DATA 7 MSB DATA 6 DATA 4 DATA 3 DATA 5 5 1 ELECTRICAL CHARACTERISTICS Fig 5 4 partial schematic of Digital Video Output O O O O O O Function O I O manufacturer JST O O Pin No O DATA 0 LSB GND common BM14B SRSS GND co...

Page 16: ...e Vol Fig 5 6 Electrical Characteristic Table DCK DATA Parameter Symbol Output High Voltage Min Typ Voh 2 4 Tdl Max 0 4 V Iol 6mA Ioh 6mA V Remarks Unit Tclk 34 9 DCK Cycle Time EIA nS 1 28 636363MHz 34 9 Data Output Time EIA Tdt Data Output Delay Time DCK Cycle Time CCIR Tclk 35 2 1 28 375MHz 35 2 nS nS Data Output Time CCIR Tdt 1 5 nS nS 13 ...

Page 17: ...Code Chroma Signal and Luminance Signal data format comply with the ITU R BT 656 standards however due to the difference in DCK frequency the Blanking Data Number Effective Data Number and Total Data Number do not comply with ITU R BT 656 DCK 27MHz The Figure below shows the output data number for each EAV Byte 1440 1440 CCIR 28 375000 EIA 1716 1728 4 1512 1478 Effective DATA Byte Total Data Byte ...

Page 18: ...TRC code XX is output according to the Figure below NOTE F 0 during field 1 F 1 during field 2 V 0 elsewhere V 1 during field blanking H 0 in SAV H 1 in EAV P0 P3 protection bits Fig 5 11 EIA Fig 5 12 CCIR shows the output timing for 1 line worth of digital data Fig 5 13 EIA Fig 5 14 CCIR shows the output timing for 1 frame worth of digital data F1 0 1 0 0 0 1 0 1 1 1 1 1 1 1 1 1 0 0 1 1 0 EC 1 1 ...

Page 19: ...0 31 32 Active Video Data Cb Cr 80 h Y1 Y756 luminance DATA 01 FE h 1512 byte 1820 DCK Line 8 DCK 7 DCK Y755 80 Y752 80 Y753 80 Y754 80 Y756 FF 0 EAV code SAV code Y755 Y753 80 Y754 80 H BLK DATA Cb Cr 80 h Y 10 h 300 byte 7 DCK 4 DCK 300 DCK 4 DCK 1512 DCK Y3 80 Y752 80 D7 D0 OUT 10 80 10 80 C7 80 Y1 80 Y2 80 10 80 10 FF 0 0 DA 80 10 80 10 80 4 DCK 300 DCK 4 DCK 1512 DCK D7 D0 OUT 80 Y756 FF 0 0 ...

Page 20: ...10 1820 DCK Line 7 DCK 4 DCK 300 DCK 4 DCK 1512 DCK 80 Y756 FF 0 EAV code H BLK DATA Cb Cr 80 h Y 10 h 300 byte SAV code Active Video Data Cb Cr 80 h Y1 Y756 luminance DATA 01 FE h 1512 byte 80 Y753 80 Y754 80 Y755 Y2 80 Y3 80 Y752 0 0 80 80 Y1 80 10 80 10 80 10 FF 0 0 9D 80 10 80 Y754 80 Y755 80 Y756 FF 7 DCK 4 DCK 300 DCK 4 DCK 1512 DCK D7 D0 OUT Y752 80 Y753 80 297 FLD1 ODD FLD FLD2 EVEN FLD 18...

Page 21: ...0 80 0 AB 80 10 80 10 80 10 80 10 FF 0 0 B6 80 10 80 10 80 10 80 10 FF 0 D7 D0 OUT 10 80 10 80 10 1808 DCK Line 7 DCK 4 DCK 330 DCK 4 DCK 1478 DCK 80 Y739 FF 0 EAV code H BLK DATA Cb Cr 80 h Y 10 h 330 byte SAV code Active Video Data Cb Cr 80 h Y1 Y739 luminance DATA 01 FE h 1478 byte 80 Y736 Y737 80 Y738 Y2 80 Y3 80 Y735 0 C7 80 Y1 80 80 80 10 80 10 FF 0 0 B6 80 10 80 10 80 Y738 80 Y739 FF 0 D7 D...

Page 22: ...FF 0 EAV code H BLK DATA Cb Cr 80 h Y 10 h 330 byte SAV code V Blanking DATA Cb Cr 80 h Y 10 h 1478 byte 10 80 10 80 10 80 80 10 80 10 80 0 EC 80 10 80 10 80 10 80 10 FF 0 0 F1 80 10 80 10 80 10 80 10 FF 0 D7 D0 OUT 10 80 10 80 10 1808 DCK Line 7 DCK 4 DCK 330 DCK 4 DCK 1478 DCK 80 Y739 FF 0 EAV code H BLK DATA Cb Cr 80 h Y 10 h 330 byte SAV code Active Video Data Cb Cr 80 h Y1 Y739 luminance DATA...

Page 23: ...B 80 10 80 AB 80 10 80 10 FF 0 0 B6 80 10 80 FF 0 0 B6 10 80 10 0 0 80 10 80 80 10 80 10 80 Y3 80 Y754 10 FF 10 80 80 80 Y756 80 Y755 80 Y753 80 10 80 Y4 FF 0 0 80 80 Y1 80 10 FF 0 0 9D 80 10 80 10 80 Y756 80 Y753 80 Y754 80 10 80 10 80 Y4 FF 0 0 80 FF 0 0 9D 80 10 80 10 80 Y2 80 Y755 80 Y1 80 Y3 Y756 80 Y753 80 Y754 80 80 Y2 80 Y3 80 Y755 80 10 80 Y4 FF 0 0 80 80 Y1 Y4 80 80 Y3 FF 0 FF 0 0 9D Y75...

Page 24: ...0 80 10 FF 0 0 80 Y1 10 80 10 80 80 Y3 80 Y4 80 80 Y738 80 Y737 80 Y739 FF 0 0 9D 80 10 80 10 80 Y2 80 80 Y3 10 FF 0 0 10 0 AB 80 80 80 Y1 80 Y2 Y4 80 10 10 80 80 10 80 Y738 80 80 Y736 80 Y737 80 Y739 FF 0 0 B6 80 10 80 FF 0 80 10 80 10 80 10 80 10 FF 0 0 B6 80 10 80 10 80 10 80 10 FF 10 0 0 AB 80 10 80 10 80 10 80 10 80 10 80 80 10 80 10 80 10 10 10 10 80 10 80 10 80 10 80 10 80 FF 0 0 B6 80 10 8...

Page 25: ...ctor J7 various functions of WAT 910BD can be controlled directly without using OSD 1 SPI communication connector Refer to the following figure for the position of SPI communication connector J7 6 SPI COMMUNICATION Fig 6 1 SPI Communication Connector J7 J7 22 ...

Page 26: ...stor elements are connected between each terminal and camera GND as countermeasure for the electrostatic discharge and or surge damage Each pin is connected to 3 3V internal camera circuit through resistors 4 7k ohm Fig 6 3 partial schematic of SPI Communication GND GND common I O SPI SDA manufacturer Pin No Description I O SPI SCL Fig 6 2 Pin Function and Descriptions Parts Shape Name Parts No SP...

Page 27: ... Command All the Write commands are direction from the external MCU to the camera DSP master to slave So GPIO of external MCU is used as MOSI and a command is outputted to camera SPI SDA as it is GPIO of external MCU is always used as output port SPI_SLD_O SS L active SPI_SCL_O SCLK SPI_SDA_O GPIO MOSI H L level of MISO MOSI changes are synchronize with SCLK falling edge and Data latch is done syn...

Page 28: ...ng address period GPIO of external MCU is used as output port then it is switched to input port Read command sequence Step 1 Read address Send Master to Slave SPI_SLD_O SS L active SPI_SCL_O SCLK SPI_SDA_O GPIO MOSI Step 2 Data receive Slave to Master SPI_SLD_O SS L active SPI_SCL_O SCLK SPI_SDA_O GPIO MISO The timing charts of Read command after send command it will be returned response to master...

Page 29: ...WAT 910BD H W MANUAL Fig 6 7 N byte Read command master to slave and slave to master timing chart Fig 6 6 1 byte Read command master to slave and slave to master timing chart 26 ...

Page 30: ...WAT 910BD H W MANUAL 4 Actual wave form of SPI Read Command 27 ...

Page 31: ...ue of ST 0x3B register shows the status of the end of normal execution error of CTL COMMAND and turns into one of the following values Execution of camera CTL COMMAND is specifically expressed at the following steps Description DO COMMAND This status code is written by EXT MCU only EXEC NORMALLY This status code is written by CAM MCU only EXEC ERROR This status code is written by CAM MCU only 3 A5...

Page 32: ...rs and execute them Step 3 CHECK ST CODE EXTERNAL MCU EXTERNAL MCU SPI Read Indirect Registers ST code AA EXTERNAL MCU 0x36 C1 0x3B 0x39 0x3A 0x38 Wait ST DAT CS ST 0x39 Indirect Registers 0x3B ADR 0x37 C2 ST code 55 AA A5 CAMERA DSP DAT 0x3A CS 0x38 MCU Address Symbol SPI Write CAMERA DSP 0x3A 0x3B CS ST 0x37 ADR MCU Address Symbol 0x36 C1 0x37 C2 ADR DAT Address Symbol C1 C2 0x39 CAMERA DSP Indi...

Page 33: ...his case we should check command format correctness of ADR DATA CS data and send correct command to indirect registers If ST code is stay AA CTL COMMAND execution is in execution Step 4 RESPONSE READ After checking ST CODE 55 by using SPI Read command get DAT 0x39 by using SPI read command This is a basic step for CTL COMMAND camera parameter read If you need fully secure it need to check indirect...

Page 34: ...on 55 EXEC NORMALLY A5 EXEC ERROR 2 CAMERA PARAMETER READ2 parameter address 0x500 0x5FF SPI Write data set 1 Parameter address lower byte Assignable value range is 00 to FF 2 Check sum lower byte of C1 C2 ADR DAT In READ command DAT value is always set 00 SPI Read data set camera MCU response 1 Parameter address lower byte Same as SPI Write data 2 Paramwter value 3 Check sum lower byte of ADR DAT...

Page 35: ...XEC NORMALLY A5 EXEC ERROR 4 CAMERA PARAMETER WRITE2 address 0x500 0x5FF SPI Write data set 1 Parameter address lower byte Assignable value range is 00 to FF 2 Parameter Value 3 Check sum lower byte of C1 C2 ADR DAT SPI Read data set camera MCU response 1 Parameter address lower byte Same as SPI Write data 2 Parameter value Same as SPI Write data 3 Check sum lower byte of ADR DAT 4 ST CODE AA in e...

Page 36: ... OFF 6 CAMERA OSD CONTROL 5 KEY OPERATION SPI Write data set 1 5 key direction See following table 2 Check sum lower byte of C1 C2 ADR DAT SPI Read data set camera MCU response 1 Parameter value Same as SPI Write data 2 Check sum lower byte of ADR DAT 3 ST CODE AA in execution 55 EXEC NORMALLY A5 EXEC ERROR 1 2 AA Value 02 00 00 ST DAT Symbol C1 C2 ADR CS C1 ADR DAT CS ST 00 2 3 C2 ADR Value 00 1 ...

Page 37: ... camera MCU response 1 ST CODE AA in execution 55 EXEC NORMALLY A5 EXEC ERROR By executing this command the parameter values that have been changed will be kept even after power on off cycle 00 1 Symbol ADR DAT CS ST Value 00 00 00 AA Symbol C1 DAT CS C2 ADR ST Value 01 FF 00 00 34 ...

Page 38: ...F FIX SHUTTER SPEED 0x00 x256 0x01 x128 0x02 x64 0x03 x32 0x04 x16 0x05 x8 0x06 x4 0x07 x2 0x08 EI 0x0C 1 500 0x0D 1 1000 0x0E 1 2000 0x0F 1 5000 0x410 notice 2 Be sure to set large value than AGC MIN notice 1 Be sure to set 5 or more large values actual AGC LOW MAX dB 0x05 0xFF 4 0 035 5 3 default 0xB0 approx 30 dB notice 1 Be sure to set 5 or more large values notice 2 Be sure to set large value...

Page 39: ...et small value less than all AGC LO MID HI MAX HSBLC LEVEL Address Bit 7 0x418 6 5 0x00 LOW 0x01 MID 0x02 HI BLC WINDOW H SIZE 0x41D BLC WINDOW V SIZE 0x01 1 min 0x04 0x08 8 max BLC WINDOW H START POSITION 0x00 OFF AGC MIN 0x00 0 LEFT 0x02 0x07 7 RIGHT 0x41C BLC WINDOW V START POSITION 0x00 0 TOP 0x02 0x07 7 BOTTOM 0x01 1 min 0x04 0x08 8 max 0x00 0 TOP 0x02 0x07 7 BOTTOM 0x01 1 min 0x04 0x08 8 max...

Page 40: ... 0x447 0x44B 0x450 0x44C 0x44E 0x00 0 LEVEL 0x09 0x0F 15 LEVEL 0x44D 0x452 0x44A 0x44F WDR USER2 H LEVEL 0x453 0x451 1 ON WDR USER1 H LEVEL 0x00 0 LEVEL 0x03 0x0F 15 LEVEL WDR USER1 L LEVEL 0x00 0 LEVEL 0x0D 0x0F 15 LEVEL 0x448 WDR MODE 0x00 OFF 0x01 USER1 0x02 USER2 0x449 3DNR LEVEL 0x00 0 LEVEL 0x32 0x64 100 LEVEL 3DNR 0 OFF WDR USER2 L LEVEL 0x00 0 LEVEL 0x0B 0x0F 15 LEVEL 37 ...

Page 41: ...T V POSITION 0x01 TOP 0x28 0x8F BOTTOM 0x04 LEFT 0x46 0xBB RIGHT Note that the sum of V POSITION and V SIZE is not to exceed 0x90 Note that the sum of H POSITION and H SIZE is not to exceed 0xBF 0x461 1 0 SHARPNESS 0x00 0 LEVEL 0x04 0x1F 31 LEVEL 6 5 Bit 4 3 2 0x454 Address 7 0x455 0x456 0x459 0x457 0x45B 0x45F 0x45E 0x45D 0x458 0x45C 0x45A 0x32 0 0x31 1 0x28 10 0x1E 20 0x14 30 0x0B 39 0x0A 40 Whe...

Page 42: ... H SIZE is not to exceed 0xBF 1 ON 0x471 0x472 MOTION AREA4 START H POSITION 0x46D MOTION AREA2 V SIZE 0x01 min 0x28 0x90 max Note that the sum of V POSITION and V SIZE is not to exceed 0x90 0x46F MOTION AREA3 START V POSITION 0x46E MOTION AREA3 START H POSITION 0x04 LEFT 0x83 0xBB RIGHT Note that the sum of H POSITION and H SIZE is not to exceed 0xBF 0x46C MOTION AREA2 H SIZE 0x04 min 0x3F 0xBB m...

Page 43: ...0x4A1 0x4A0 0x49F 0x49E 0x49D 0x49C 0x49B 0x49A 0x499 0x498 0x497 0x496 0x495 0x494 0x493 0x492 0x491 0x490 0x48F 0x48E 0x48D 0x48C 0x48B 0x48A 0x489 0x488 0x487 0x486 0x485 0x481 0x484 0x483 0x47F 0x482 0x47E 0x480 0x47C 0x47D 0 Address Bit 7 6 5 4 3 2 1 40 ...

Page 44: ...OWN 0 OFF 1 ON 4 3 0x4AA ZOOM PAN 0x00 100 LEFT 0x01 99 0x63 1 0x64 0 CENTER 0x65 1 0xC7 99 0xC8 100 RIGHT 0x33 x26 0x34 x28 0x35 x30 0x36 x32 0x23 x6 5 0x24 x7 0 0x25 x7 5 0x26 x8 0 0x27 x9 0x28 x10 0x29 x11 0x2A x12 0x2B x13 0x2C x14 0x2D x15 0x2E x16 0x2F x18 0x30 x20 0x31 x22 0x32 x24 ZOOM FLIP GAMMA 0x00 USER 0x01 0 05 0x09 0 45 0x14 1 0 0x4B1 0x4B0 0x00 OFF 0x4A8 0x4A9 ZOOM magnification 0x0...

Page 45: ...0x4EC 0x4EB 0x4EA 0x4E9 0x4E8 0x4E7 0x4E6 0x4E5 0x4E4 0x4E3 0x4E2 0x4E1 0x4E0 0x4DF 0x4DE 0x4DD 0x4DC 0x4DB 0x4DA 0x4D9 0x4D8 0x4D7 0x4D6 0x4D5 0x4D4 0x4D3 0x4D2 0x4D1 0x4D0 0x4CF 0x4CE 0x4CD 0x4CC 0x4CB 0x4CA 0x4C9 7 6 0x4C8 0x4C7 Bit 0 5 Address 3 1 2 4 42 ...

Page 46: ...0x4FE BPC LEVEL BPC FLD 0x01 1 0x03 3 0x04 4 0x00 x4 0x01 x8 0x02 x16 0x03 x32 0x04 x64 Address Bit 7 6 5 4 3 0x4FD 0x4FA 0x4FC 0x4FB 0x4F9 0x4F8 0x4F5 0x4F7 0x4F6 SETUP 1 0x4F4 0x4F3 ON OFF 0 0 IRE 1 7 5 IRE 0x4FF SETUP LEVEL 1 0x00 0x1C 0x0x3F 43 ...

Page 47: ...4 0x502 0x501 0x500 7 6 5 Address 4 3 2 Bit 0 0x50B 0x507 0x50C 0x50D 0x50E 0x50F 0x510 0x511 0x512 0x513 0x514 0x515 0x516 0x517 0x518 0x519 0x51A 0x51B 0x51C 0x51D 0x51E 0x51F 0x520 0x521 0x522 0x523 0x524 0x525 0x526 0x527 0x528 0x529 0x52A 0x52B 0x52C 0x52D 44 ...

Page 48: ...533 0x534 0x535 0x536 0x537 0x538 0x539 0x53A 0x53B 0x53C 0x53D 0x53E 0x53F 0x540 0x541 0x542 0x543 0x544 0x545 0x546 0x547 0x548 0x54B 0x549 0x54A 0x54C 0x54D 0x54E 0x54F 0x550 0x551 0x552 0x553 0x554 0x557 0x555 0x556 0x558 0x55B 0x55A 0x559 Address Bit 7 6 5 45 ...

Page 49: ...560 0x55F 0x55E 0x561 0x565 0x563 0x564 0x566 0x567 0x562 0x568 0x56B 0x569 0x56E 0x56F 0x56C 0x56D 0x56A 0x573 0x570 0x571 0x575 0x574 0x572 0x576 0x577 0x578 0x579 0x57A 0x57B 0x57C 0x57D 0x57E 0x57F 0x580 0x581 0x582 0x583 0x584 0x585 0x586 0x587 0x588 0x589 46 ...

Page 50: ...58B 0x58C 0x58D 0x58E 0x58F 0x590 0x591 0x592 0x593 0x594 0x595 0x596 0x597 0x598 0x599 0x59C 0x59B 0x59E 0x59D 0x59F 0x5A2 0x5A0 0x5A1 0x5A4 0x5A3 0x5A5 0x5A6 0x5A8 0x5A7 0x5A9 0x5AA 0x5AB 0x5AF 0x5AD 0x5AC 0x5AE 0x5B0 0x5B1 0x5B2 0x5B3 0x5B4 0x5B5 0x5B6 0x5B7 47 ...

Page 51: ...2 1 0x5B8 0x5B9 0x5BA 0x5BB 0x5BC 0x5BD 0x5BE 0x5BF 0x5C0 0x5C1 0x5C2 0x5C3 0x5C4 0x5C5 0x5C6 0x5C7 0x5C8 0x5C9 0x5CA 0x5CB 0x5CC 0x5CD 0x5CE 0x5CF 0x5D0 0x5D1 0x5D2 0x5D3 0x5D4 0x5D5 0x5D6 0x5D7 0x5D8 0x5D9 0x5DA 0x5DD 0x5DB 0x5DC 0x5DE 0x5DF 48 ...

Page 52: ...4 0x5E3 0x5E1 0x5E5 0x5E6 0x5E7 0x5E8 0x5E9 0x5EA 0x5EB 0x5EC 0x5ED 0x5EE 0x5EF 0x5F0 0x5F1 0x5F2 0x5F3 0x5F4 0x5F5 0x5F6 0x5F7 0x5F8 0x5F9 0x5FA 0x5FB 0x5FC 0x5FD 0x5FE 0x5FF DIGIT OUT 0 OFF 1 ON 0 OFF 1 ON FACTORY RESET BPC 0 OFF 1 START 0x5E2 0x5E0 49 ...

Page 53: ...ec S Igarashi CPU GROUP 1B include sfr_r81b h define TRUE 1 define FALSE 0 define CLKMS 500 for wait counter global variables unsigned char SEND_BUFF 0x10 Send Buffer 16 byte unsigned char READ_BUFF 0x10 Receive Buffer 16 byte unsigned char SW_STATUS SW input value unsigned char SW_S_C 4 temporary variables for avoid SW chattering unsigned int Adr_C 0x400 Address counter prototyping checking to wh...

Page 54: ...up1 P1 are all SW input pd1_0 0 UP pd1_1 0 DOWN pd1_2 0 LEFT pd1_3 0 RIGHT pd1_4 0 SET pd1_5 0 DIP1 pd1_6 0 DIP2 pd1_7 0 DIP3 port I O setting P3_3 4 5 7 are using SPI communication pd3_3 0 MISO SIMO 3wire pd3_4 1 SCLK pd3_5 1 SS pd3_7 1 pd4_5 1 LED for status display initialize output port p3_4 1 SCLK H p3_5 1 SS H p3_7 1 p4_5 1 LED OFF initialize SW input port ALL OFF ON L p1 0xFF MAIN LOOP whil...

Page 55: ..._status TRUE p4_5 0 LED lit ON else p4_5 1 end of main FUNCTION check_key_status Decode SW status and process SPI communication if illegal code was read return FALSE unsigned char check_key_status void unsigned char i unsigned char RetV TRUE FALSE decode 5 key switch SW_STATUS 0x1F case 0x1E 5key UP INC address and Read Parameter if Adr_C 0x5FF Adr_C 0x400 else Adr_C RetV INDIRECT_READ Adr_C break...

Page 56: ...ar RetV temp AGC MAX ADDRESS 0x401 READ SEND_BUFF 2 0x00 SEND_BUFF 3 0x00 SEND_BUFF 4 0x01 SEND_BUFF 5 0x00 SEND_BUFF 6 0x01 SEND_BUFF 7 0xAA if SPI_WRITE_3W 0x36 8 FALSE return FALSE else RetV SPI_READ_3W 0x38 4 AGC MODE value bit3 2 AGC_V READ_BUFF 1 0x0C 2 mask 00001100 and shift if AGC_V 3 0 1 2 3 0 AGC_V 0 else AGC_V wait_ms 1 ADDRESS 0x401 WRITE SEND_BUFF 2 0x00 BANK 0 SEND_BUFF 3 0x80 SEND_...

Page 57: ...UFF 2 0x01 SEND_BUFF 3 0x00 SEND_BUFF 4 0x00 SEND_BUFF 5 0x00 BLC AREA OFF SEND_BUFF 6 0x01 SEND_BUFF 7 0xAA return SPI_WRITE_3W 0x36 8 unsigned char INDIRECT_READ unsigned int Pm_Adr unsigned char Bank unsigned char Adrs Bank unsigned char Pm_Adr 8 0x04 Adrs unsigned char Pm_Adr SEND_BUFF 2 0x00 SEND_BUFF 3 Bank SEND_BUFF 4 Adrs SEND_BUFF 5 0x00 SEND_BUFF 6 unsigned char Bank Adrs SEND_BUFF 7 0xA...

Page 58: ..._BUFF 1 unsigned char WriteCMD 8 higher 8bit i 0 Byte Counter initialize SPI bus p3_5 1 SS H p3_4 1 SCLK H wait_nop SPI WRITE COMMAND send start pd3_3 1 set port direction MOSI output p3_3 1 MOSI H p3_5 0 SS L while i W_Byte W_Byte must 8 in INDIRECT ACCESS j 1 Bit Mask while j 0xFF 8bit send SendBit SEND_BUFF i j 1 0 bit test j j 1 j 2 p3_4 0 SCLK L p3_3 SendBit output LSB first bit data on MOSI ...

Page 59: ...D COMMAND int i counter int j unsigned char SendBit make SPI READ COMMAND ReadCMD int R_Adr 1 1 SEND_BUFF 0 unsigned char ReadCMD lower 8bit SEND_BUFF 1 unsigned char ReadCMD 8 higher 8bit i 0 Byte Counter initialize SPI bus p3_5 1 SS H p3_4 1 SCLK H wait_nop SPI READ COMMAND send start pd3_3 1 set port direction MOSI output p3_3 1 MOSI H p3_5 0 SS L wait_nop while i 2 2 byte loop j 1 bit mask whi...

Page 60: ...READ_BUFF i 0x00 clear buffer while j 8 8bit receive p3_4 0 SCLK L Data Change wait_nop wait_nop p3_4 1 SCLK H latch LSB first receive from MISO READ_BUFF i unsigned char p3_3 j j Next Bit i Next Byte p3_5 1 SS H END return TRUE msec wait void wait_ms unsigned int wms unsigned int w_cnt while wms w_cnt CLKMS while w_cnt void wait_nop void asm nop asm nop asm nop asm nop asm nop asm nop 57 ...

Page 61: ...by using SPI write command SS SCLK MOSI MIS0 Step 2 Send SPI read command to get and check ST CODE address 0x3B SS SCLK MOSI MIS0 DO COMMAND In this example ST CODE is still 0xAA It means that CAMERA MCU is busy Therefore after about 1 mS waiting It needs retrying MSB first LSB first MSB first MOSI DATA LSB first 0 0 C 1110 1110 0 0 0101 0 1000 0 0000 0 0 A A A 1000 0101 0101 0000 0 1 A 0 0000 000...

Page 62: ...11 and send to CAMERA Step 4 Send CAMERA PARAMETER WRITE1 command to indirect registers CAMERA Address 0x36 0x3B to set AGC MODE Address 0x401 parameter to CAMERA Following wave form is above operation by using SPI write command SS SCLK MOSI MIS0 0110 MOSI DATA MSB first MOSI DATA 0 0 0000 LSB first MSB first 6 C 0011 1000 1110 MIS0 DATA 7 1 0000 0 0000 0 0 0 0 0000 0000 0000 1 8 0000 LSB first 00...

Page 63: ...AT 910BD H W MANUAL Step 5 Send SPI read command to get and check ST CODE address 0x3B SS SCLK MOSI MIS0 EXEC NORMALLY LSB first MSB first 1110 1110 0000 1010 0000 1010 MOSI DATA 5 0 0 5 MISO DATA 7 7 60 ...

Page 64: ...1 interlace Video output Composite Video 1 0 V p p 75Ω unbalanced ON OFF Minimum illumination LO 6 30dB MID 6 34 5dB HI 6 41dB 6 41dB 1dB step selectable Gamma characteristics 0 05 1 0 0 05 step USR S Curve default 0 45 AGC ON OFF x256 x128 x64 x32 x16 x8 x4 x2 field OFF 1 60 EIA 1 50 CCIR FL 1 100 EIA 1 120 CCIR 1 250 1 500 1 1000 1 2000 1 5000 1 10000 1 100000 Electronic IRIS fix speed 1 60 EIA ...

Page 65: ...WAT 910BD H W MANUAL Unit mm 8 DIMENSIONS 62 ...

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