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VA41620/VA41630 Evaluation Board User’s Manual

V1.0

10

Table 4 - PEB1 GPIO Board Connector designations

PEB1 EBI/Ethernet board (shown without the PEB1 MCU board attached). The connection

between the two boards is made by aligning the plastic pins on the lower board with the holes

on the upper board.

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Summary of Contents for PEB1

Page 1: ...PEB1 USER MANUAL Evaluation board for VA416x0 MCU from VORAGO JUNE 20 2020 VORAGO TECHNOLOGIES...

Page 2: ...7 Board connectivity 7 1 8 Connector pin assignment table for GPIO board 8 1 9 Support 13 2 Software Setup 13 2 1 Required Downloads 14 3 Hardware check 17 3 1 Powering up the board 17 4 Command line...

Page 3: ...IO board The PEB1 EBI Ethernet board 1 3 Key components included on the PEB1 evaluation kit subject to change depending on availability The PEB1 MCU board o VORAGO VA416x0 MCU o IDT 501MLFT PLL clock...

Page 4: ...e MCU board may be used standalone with full JTAG and includes a UART for background communication Figure 1 Block diagram of PEB1 1 3 2 The PEB1 GPIO board The PEB1 GPIO board provides additional conn...

Page 5: ...eripherals the External Bus Interface EBI Ethernet interface board provides access to 41 GPIO pins as well as access to ADC inputs DAC outputs I2C interfaces CAN interfaces with transceivers and a con...

Page 6: ...VA41620 VA41630 Evaluation Board User s Manual V1 0 5 1 4 PEB1 MCU board component placement diagram...

Page 7: ...ds are included in PEB1 download package To assist with quickly finding which pins are tied to the various connectors on the board the following set of tables are provided Table 1 PEB1 MCU Board Conne...

Page 8: ...tion boards Programmed with demonstration program 36 Micro USB cable Insert card with component placement picture and URL 10 jumpers and several wires 1 7 Board connectivity This photo shows the PEB1...

Page 9: ...620 VA41630 Evaluation Board User s Manual V1 0 8 1 8 Connector pin assignment table for GPIO board The GPIO board has two large 0 1in headers labeled J21 and J22 The connections to the MCU are as fol...

Page 10: ...VA41620 VA41630 Evaluation Board User s Manual V1 0 9 Table 3 PEB1 GPIO Board Connector designations...

Page 11: ...1 0 10 Table 4 PEB1 GPIO Board Connector designations PEB1 EBI Ethernet board shown without the PEB1 MCU board attached The connection between the two boards is made by aligning the plastic pins on th...

Page 12: ...VA41620 VA41630 Evaluation Board User s Manual V1 0 11...

Page 13: ...VA41620 VA41630 Evaluation Board User s Manual V1 0 12 Table 5 PEB1 EBI Ethernet Board Connector designations...

Page 14: ...Keil IAR or iSystem Segger J Link RTT viewer and Embedded code running on the VA416x0 processor The IDE allows code to be developed compiled debugged and programmed to an SPI FRAM on the MCU board The...

Page 15: ...tools are evaluation versions and are free of charge Please download the Keil IDE the Segger J Link software and the VORAGO PEB1 software development code as outlined in the below sections 2 1 1 Keil...

Page 16: ...VA41620 VA41630 Evaluation Board User s Manual V1 0 15 Please use the default directories for the core and pack when prompted for information during the install...

Page 17: ...it The VA416xx pack will be loaded later when we open the project 2 1 2 Segger J Link https www segger com jlink software html Select Software and documentation pack for Windows V6 10n 23 162 KB If a...

Page 18: ...g jumpers should be inserted o 5v supply from USB jumper on JP10 o Clock source JP8 Jumper between pins 7 and 8 o MCU voltage 3 3v and 1 5v supply shunts on JP4 pin 5 to 6 and pin 7 to 8 o Analog volt...

Page 19: ...s I2CA and I2CB be externally connected together cantest Requires CAN0 and CAN1 be externally connected together readport portNum mask Ports A through port G are read and a 16 bit hex value is display...

Page 20: ...e ebiwrite 0x60000000 0x0 Response OK ebiread addr Reads one address location of the memory connected to the EBI Example ebiread 0x60000000 Response OK 0x00000000 cantest None Performs a test of both...

Page 21: ...esponse OK 2019_11_12_v1 srst None Software reset of MCU Example srst Response None Device will lose its connection to the J Link RTT terminal and will have to be reconnected 4 1 J Link OB and RTT Rea...

Page 22: ...shown that allows the user to configure the connection Please set the below options and control block address The control block is a designated piece of memory for buffering information to and from t...

Page 23: ...p command will produce the following results 4 1 2 Starting and Stopping RTT Viewer Starting the viewer can occur at any time during a debug session However after the Viewer is connected and the MCU e...

Page 24: ...arkfun com products 12731 can be used to connect a PC to the board PORTG 0 and PORTG 1 are available on connector J7 of the PEB1 board 5 Starting an IDE and building a program Depending upon which IDE...

Page 25: ...VA41620 VA41630 Evaluation Board User s Manual V1 0 24 Double click on the file ending with uvprojx and the Keil IDE should open with this project loaded The screen should look like the figure below...

Page 26: ...rtex microcontroller software interface standard php ARM has created an efficient way to pull in all the necessary information for an IDE to work with an MCU The pack file has NVM programming code hea...

Page 27: ...s Programming files for the SPI FRAM on the MCU or on the board 5 1 3 Configuring options The Keil IDE is a very powerful and flexible tool which requires several options to be assigned before it is o...

Page 28: ...terfaces The default debug connection is the ULINK2 from Keil The PEB1 board has a built in SWD interface called Segger J Link OB The IDE must be told which interface is used See below for screen capt...

Page 29: ...oard should be connected to a PC prior to setting up the Debugger This will allow the tool to identify the J LINK OB and the IDCODEs of the MCU s TAP controllers Note An error message may be displayed...

Page 30: ...hot keys or icons that can be clicked on To compile and link the entire project the Rebuild all target files function must be called The Build button translates modified or new source files and gener...

Page 31: ...con to perform the same task Once the IDE has entered debug mode the screen appearance will resemble the following image Many options are available under the debug menu as shown here Most of these fun...

Page 32: ...ternal SPI based memory device to boot from The 256kbyte FRAM memory is transferred to the MCU s program RAM automatically during the MCU boot process by a hardware bootloader The location of the code...

Page 33: ...s the VA416xx the Utilities options menu must be set up First click on the Use Target Driver for Flash Programming button Then click on the Settings button Under the programming Algorithm section clic...

Page 34: ...tware Development Kit VORAGO provides a good starting point for end application development with the PEB1 SDK software development kit This section gives a brief tour of the kit 6 1 Project organizati...

Page 35: ...IS compatible driver ARM has created the Cortex M Software Interface Standard CMSIS to provide a basis for structuring code such that it can be ported from one ARM based MCU to another Details on this...

Page 36: ...e correctly b If the hardware RESET button is pressed on the board the device will reload program RAM with information from the FRAM which overwrites what the debugger placed in RAM If this is the cas...

Page 37: ...CLKSCALE 0x5161 baud rate 50Mhz VOR_UART BANK 0 ENABLE 2 only enable TX bit position 1 VOR_UART BANK 0 DATA 0x5A send single byte out 8 Other resources for VA416x0 code Vorago application notes http w...

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