Vizio VP50HDTV10A, Service Manual

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File No. SG-0219
The operation of Video Processor FLI8532
The Genesis Microchip FLI8532 includes an integrated 3-D Digital Video Decoder with
Faroudja DCDi CinemaTM video format conversion, video enhancement, and noise
reduction.
The auto-detection and Faroudja DCDi CinemaTM technology allow the FLI8532 to detect,
process, and enhance any video or PC graphic format. The FLI8532 supports many
worldwide VBI standards for applications of Teletext, Closed Captioning, V-Chip, and other
VBI technologies.
Figure 8-2 FLI8532 Block Diagram
Clock Generation:
The FLI8532 features six clock inputs. All additional clocks are internal clocks derived from
one or more of these:
1.Crystal Input Clock (TCLK and XTAL). This is the input pair to an internal crystal oscillator
and corresponding logic. A 19.6608 MHz TV crystal is recommended for best noise
immunity with the 3D decoder. Alternatively, a single-ended TTL/CMOS clock oscillator can
be driven into the TCLK pin (leave XTAL as N/C in this case). If an external crystal is being
used, connect a 10K pull-up to OCMADDR_19. See Figure 9.
2.Digital Input Video/Graphics Clocks (IPCLK0, IPCLK1, IPCLK2 and IPCLK3)
3.Audio Delay Clock (AVS_CLK)
The FLI8532 TCLK oscillator circuitry is a custom designed circuit to support the use of an
external oscillator or a crystal resonator to generate a reference frequency source for the
FLI8532device.