SIB064B Sensor Interface Board for Hamamatsu 64 Channel MAPMTs
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Vertilon Corporation, 66 Tadmuck Road, Westford, MA 01886
/
Tel: (978) 692-7070
/
Fax: (978) 692-7010
/
www.vertilon.com
Leading Edge Discriminator
The leading edge discriminator is a simple timing circuit that generates a trigger signal when a charge pulse on the last
dynode output from the MAPMT exceeds a user-defined threshold. It is implemented using a high speed comparator
connected to the output of the last dynode preamplifier. Referring to Figure 6, negative going pulses from the preamplifier
are compared to the discriminator threshold that is set through the SIB064B dialog box in the PhotoniQ GUI. A logic high
(for
positive
polarity control) is generated on the trigger output (SMB connector J5) after a small delay (t
d1
) from when the
pulse first crosses the threshold, V
th
. The trigger LED flashes indicating that a current pulse crossed the threshold. The
discriminator switches back to a logic low when the pulse crosses the threshold from the opposite direction as it returns
back to the baseline level. Because the trigger point is sensitive to the pulse height, this discriminator is typically used in
applications that do not require precision timing.
Figure 6: Leading Edge Discriminator Timing
PREAMP
OUTPUT
V
th
t
d1
TRIGGER
POINT
THRESHOLD
POINT
TRIG OUT
LAST
DYNODE
