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VersaLogic VL-EPM-31 Hardware Reference Manual Download Page 65

 

EPM-31 Hardware Reference Manual 

64

 

CBR-2004B Paddleboard 

To access the 16 digital I/O lines on the EPM-31 board, a paddleboard and 12-inch cable are 
available from VersaLogic, part number VL-CBR-2005.  

CBR-2004B Connectors 

Figure 31 shows the locations and pin orientations of the connectors on the CBR-2004B 
paddleboard. 

 

Item 

Description 

J5 

Main I/O connector  

(mates with the EPM

-

31 board’s digital I/O connector) 

J4 

Digital I/O lines 13-16 

J3 

Digital I/O lines 9-12  

J2 

Digital I/O lines 5-8 

J1 

Digital I/O lines 1-4 

 

Figure 31. CBR-2004B Connectors 

 

 

Figure 32. J4/J3/J2/J1 Digital I/O Terminal Block Pinouts 

12 

Summary of Contents for VL-EPM-31

Page 1: ...l REV April 2018 BayCat VL EPM 31 Intel Atom based Single Board Computer with Dual Ethernet Video USB SATA Serial I O Digital I O Trusted Platform Module security Counter Timers Mini PCIe mSATA PCI 10...

Page 2: ...ensure this document is error free VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for an...

Page 3: ...used in this product BIOS information and upgrades Utility routines and benchmark software VersaAPI Version 1 2 x This is a private page for EPM 31 users that can be accessed only be entering this add...

Page 4: ...EPM 31 Hardware Reference Manual iv The return shipping address...

Page 5: ...nning July 1 2006 VersaLogic Corporation is committed to supporting customers with high quality products and services meeting the European Union s RoHS directive Cautions ELECTROSTATIC DISCHARGE Elect...

Page 6: ...on an improperly mounted circuit board is not covered under the product warranty See page 15 for more details EARTH GROUND REQUIREMENT All mounting standoffs should be connected to earth ground chass...

Page 7: ...n Switches 20 Resetting the BIOS to Factory Defaults 21 Clearing Non volatile RAM and RTC Registers 21 BIOS Setup Utility 21 Operating System Installation 22 Board Features 23 CPU 23 System RAM 23 I O...

Page 8: ...abling 47 Mini Display Port Connector 48 Console Redirection 49 Network Interfaces 50 Ethernet Connector 50 Cabling 51 On Board Ethernet Status LEDs 52 Expansion Interfaces 53 SPX Expansion Bus 53 Cab...

Page 9: ...al Solutions 75 Installing the Passive Heat Sink 75 Installing the Heat Sink Fan 76 Figures Figure 1 Attaching the EPM 31 to Earth Ground vi Figure 2 VL EPM 31 BayCat Single Board Computer Top Side 12...

Page 10: ...l Block Pinouts 64 Figure 33 Location and Pin Orientation of the Main I O Connector 65 Figure 34 CBR 2004B Dimensions and Mounting Holes 66 Figure 35 EPM 31EAP CPU Core Temperature Relative to Ambient...

Page 11: ...19 User I O Connector Pinout 60 Table 20 Auxiliary I O Connector Pinout 62 Table 21 Main I O Connector Pinout 65 Table 22 CPU Thermal Trip Points 69 Table 23 Temperature Monitoring Programs 69 Table 2...

Page 12: ...ial ports Three 8254 timer counters 24 digital I O lines 16 on the EPM 31 board and an additional eight when using the VL CBR 4005 paddleboard SATA port 3 Gb s Mini PCIe mSATA socket supports Wi Fi mo...

Page 13: ...GA device C J21 Digital I O connector L J20 Main power connector D J13 COM1 COM2 Serial port connector M J5 VGA connector E J19 SPX connector N J17 microSD card socket F V1 Configuration jumpers O J24...

Page 14: ...Ethernet transformers Figure 3 VL EPM 31 BayCat Single Board Computer Bottom Side Technical Specifications See the BayCat Data Sheet for complete specifications Thermal Considerations The operating t...

Page 15: ...Introduction EPM 31 Hardware Reference Manual 14 EPM 31 Block Diagram Figure 4 EPM 31 Block Diagram...

Page 16: ...ck locations as shown in Figure 5 Figure 5 EPM 31 Dimensions and Mounting Holes Not to scale All dimensions in inches CAUTION The EPM 31 must be supported at all four mounting points to prevent excess...

Page 17: ...ation on the board s resources memory I O and IRQs a description of the FPGA s registers and programming information for the board s hardware interfaces EPM 31 BIOS Reference Manual provides informati...

Page 18: ...inch dual Ethernet RJ 45 adapter You will also need a Windows or other OS installation CD DVD and corresponding drive Basic Setup The following steps outline the procedure for setting up a typical dev...

Page 19: ...able VL CBR 0401 to the ATX power supply and SATA drive Optionally attach a LAN cable to either of the Ethernet connectors at J7 on the EPM 31 using the VL CBR 1604 RJ 45 adapter 3 Attach Power Plug t...

Page 20: ...ons JUMPER SUMMARY Table 1 Jumper Summary Jumper Block Description Reference V1 1 2 COM1 Rx End point termination In COM1 terminator enabled for RS 485 RS 422 Out COM1 terminator disabled default Tabl...

Page 21: ...ters see page 21 Off Normal operation default On Clears battery backed up non volatile memory bytes 0xE 0x7F and clears battery backed up RTC registers Position 2 No Battery Switch see Integrator s No...

Page 22: ...on the EPM 31 3 After the system boots power off the EPM 31 and set the switch back to the Off position toward the center of the board 4 Power on the EPM 31 CLEARING RAM AND RTC REGISTERS Clear RAM a...

Page 23: ...of most of the standard x86 processor based operating systems relatively simple The operating systems listed on the VersaLogic OS Compatibility Chart use the standard installation procedures provided...

Page 24: ...0 and follow the results to the Intel site and datasheet System RAM The EPM 31 accepts one 204 pin SO DIMM memory module J9 connector on the bottom side of the board with the following characteristics...

Page 25: ...ctor CAUTION To prevent severe and possibly irreparable damage to the system it is critical that the power connector is wired correctly Make use of all 5 VDC pins and all ground pins to prevent excess...

Page 26: ...ions for typical operating current do not include any off board power usage that may be fed through the main power connector Expansion boards and USB devices plugged into the board will source additio...

Page 27: ...BR 4005B paddleboard In configurations where a power button is not connected to the board if the system is put into an S5 state power can be restored by turning off the power supply and turning it bac...

Page 28: ...ower Use an external battery connected to the board through the J8 external battery connector Use the battery supplied with the CBR 4005B paddleboard Figure 9 shows the location and pin orientation of...

Page 29: ...a battery or connect an external battery to connector J8 Push Button Reset User I O connector J4 includes an input for a push button reset switch Shorting J4 pin 18 to ground causes the EPM 31 to rebo...

Page 30: ...ocations of the LEDs Indicators PROGRAMMABLE LED User I O connector J4 includes an output signal for attaching a software controlled LED Connect the cathode of the LED to J4 pin 16 connect the anode t...

Page 31: ...that illuminates if there is a problem with the processor booting Software can also be used to turn on this LED to indicate a major software failure The power LED on the VL CBR 4005B5 indicates that...

Page 32: ...TA drive is provided by the ATX power supply Note that the standard SATA drive power connector is different from the typical 4 pin Molex connector used on IDE drives Most current ATX power supplies pr...

Page 33: ...ket The VL F41 series of microSD cards provide solid state storage of 2 GB 4 GB or 8 GB The microSD socket accommodates cards with up to 32 GB of storage capacity No drivers are needed as the device i...

Page 34: ...J16 on the bottom side of the board provides a USB 3 0 Micro A host connector Figure 15 shows the location of the USB 3 0 port This interface can operate using either the Atom processor s EHCI contro...

Page 35: ...s one PCIe x1 lane one hubbed USB 2 0 channel and the SMBus interface The socket is compatible with plug in Wi Fi modems GPS receivers Flash data storage and other cards for added flexibility The VL M...

Page 36: ...D Ground 38 USB_D USB data Reserved Not connected 39 3 3VAUX 3 3V auxiliary source 3 3V 3 3V source 40 GND Ground GND Ground 41 3 3VAUX 3 3V auxiliary source 3 3V 3 3V source 42 LED_WWAN Wireless WAN...

Page 37: ...A ACTIVITY LED Figure 16 shows the location D12 of the SATA mSATA activity blue LED This LED indicates activity on either the SATA or the mSATA interface Not all mSATA drives provide this disk activit...

Page 38: ...ers to not hot plug the Mini Card By default Mini Card power stays on when the processor is in sleep modes D8 Green Activity on Wireless WAN Note Yellow Activity on Wireless LAN Note Note These LEDs w...

Page 39: ...oard each have an alternate mode accessible using the FPGA s AUXMOD1 register Refer to the EPM 31 Programmer s Reference Manual for more information on FPGA registers Three LEDs two Ethernet link stat...

Page 40: ...he 3 3V power to the Mini Card via the FPGA can go off in sleep modes or always stay on by default it goes off in sleep modes It is used for the 10 k pullup resistor power on the 8x GPIOs and usually...

Page 41: ...from 20 k to 40 k After reset the DIO lines are set as inputs with pull ups that will be detected as a HIGH state to external equipment VersaLogic provides a set of application programming interface A...

Page 42: ...l Timer 3 output J4 4 17 Digital I O 14 Optional Timer 3 input 3 18 Digital I O 15 Optional Timer 4 output 2 19 Digital I O 16 Optional Timer 4 input 1 20 Ground 5 FPGA registers control the mode on p...

Page 43: ...CPU power states on user devices connected to DIO lines is dependent on the application design These external devices would likely remain powered unless a power down mechanism is designed into the sy...

Page 44: ...e operated in RS 232 4 wire RS 422 or RS 485 modes IRQ lines are chosen in the BIOS Setup utility Each COM port can be independently enabled disabled or assigned a different I O base address in the BI...

Page 45: ...ailable for routing the J13 signals to 9 pin D sub connectors This is a 12 inch Pico Clasp 10 pin to two 9 pin D sub connector cable If your application requires a custom cable the following informati...

Page 46: ...r an RS 422 or RS 485 endpoint station it should be disabled for RS 232 and RS 485 non endpoint receivers Table 11 COM3 COM4 Termination Jumpers Jumper Position Function Jumper In Jumper Out 1 2 COM1...

Page 47: ...Twin display modes The optional VL EPH V6 video adapter card converts DisplayPort output to LVDS for flat panel operation VGA Interface The VGA port supports resolutions up to 2560 x 1600 at 60 Hz Thi...

Page 48: ...round 5 8 HSYNC Horizontal sync 13 9 Ground 10 10 VSYNC Vertical sync 14 11 CRT_SCL DDC data clock line 15 12 CRT_SDA DDC serial data line 12 CABLING An adapter cable part number CBR 1204 is available...

Page 49: ...ect indicates that a cable is plugged in The DisplayPort interface supports Audio signaling DP mode allowing connection to an HDMI device through a passive adapter Passive means that the adapter does...

Page 50: ...13 GND 14 GND 15 ML_LANE2_P 16 AUX_CH_P 17 ML_LANE2_N 18 AUX_CH_N 19 RTN 20 DP_POWER Console Redirection The EPM 31 can be configured for remote access by redirecting the console to a serial communic...

Page 51: ...10 IT Ethernet controller auto negotiates connection speed Drivers are available to support a variety of operating systems ETHERNET CONNECTOR The J7 connector provides access to the Ethernet ports 0 a...

Page 52: ...BI_DC 7 Auto Switch Tx or Rx BI_DA 8 Auto Switch Tx or Rx BI_DA Port 1 9 Auto Switch Tx or Rx BI_DD 10 Auto Switch Tx or Rx BI_DD Port 1 11 Auto Switch Tx or Rx BI_DB 12 Auto Switch Tx or Rx BI_DB 13...

Page 53: ...en LED provides status for Ethernet port 0 D2 green LED provides status for Ethernet port 1 Figure 25 Location of Ethernet Status LEDs Table 15 Ethernet Status LEDs Ethernet Port LED State Description...

Page 54: ...a CBR 0901 cable The SPX interface provides the standard serial peripheral interface SPI signals CLK MISO and MOSI as well as two chip selects SS0 and SS1 The 5 V power provided to pin 1 of the SPX c...

Page 55: ...supported through the use of clock polarity and clock idle state controls The SPI clock is derived from a 33 MHz PCI clock and can be software configured to operate at the following frequencies 8 25...

Page 56: ...ISA does not use 3 3 V power so all of the 3 3 V power is available for the PCI connector Table 17 PCI 104 Plus Connector PCI Maximum Current Voltage Maximum Current 5 V 4 0 A 3 3 V 3 0 A 12 V 1 0 A 1...

Page 57: ...available on the ISA bus when the BIOS is configured to factory defaults Table 18 Available ISA Bus I O Ranges 0x0 0x1F 0x3E 0x3F 0x93 0x9F 0x300 0x3AF 0x22 0x23 0x43 0x4F 0xA2 0xA3 0x3BC 0x3BF 0x26 0...

Page 58: ...to operating system limitations IRQ 9 is used by the ACPI SCI System Control Interrupt by default and requires a custom BIOS for use on the ISA bus IRQ 10 is used for PCI IRQ routing and usually requ...

Page 59: ...System Resources and Maps Refer to the EPM 31 Programmer s Reference Manual for the following information Memory map IRQ map I O map FPGA register map FPGA register descriptions Programming informatio...

Page 60: ...l 59 CBR 4005B Paddleboard CBR 4005B Paddleboard CBR 4005B CONNECTORS AND INDICATORS Figure 31 shows the locations of the connectors switches and LEDs on the CBR 4005B paddleboard Figure 27 CBR 4005B...

Page 61: ...onnector Pinout Pin Signal Pin Signal 1 5 V 2 GND 3 USB1_P 4 USB2_P 5 USB1_N 6 USB2_N 7 5V 8 GND 9 USB3_P 10 USB4_P 11 USB3_N 12 USB4_N 13 3 3 V 14 GND 15 SPKR 16 PLED 17 PWR_BTN 18 RST_BTN 19 GND 20...

Page 62: ...7 Molex 501189 4010 ON BOARD BATTERY CAUTION To prevent shorting premature failure or damage to the Lithium battery do not place the board on a conductive surface such as metal black conductive foam o...

Page 63: ...e 29 Location and Pin Orientation of Auxiliary I O Connector Table 20 Auxiliary I O Connector Pinout Pin Signal Pin Signal 1 I2C Clock 2 V_BATT 3 I2C Data 4 V_BATT_RETURN 5 GND 6 GND 7 FPGA GPIO1 8 FP...

Page 64: ...CBR 4005B Paddleboard EPM 31 Hardware Reference Manual 63 DIMENSIONS AND MOUNTING HOLES Figure 30 CBR 4005B Dimensions and Mounting Holes...

Page 65: ...R 2004B Connectors Figure 31 shows the locations and pin orientations of the connectors on the CBR 2004B paddleboard Item Description J5 Main I O connector mates with the EPM 31 board s digital I O co...

Page 66: ...al I O 5 7 Digital I O 6 8 Digital I O 7 9 Digital I O 8 10 GND 11 Digital I O 9 12 Digital I O 10 13 Digital I O 11 14 Digital I O 12 15 GND 16 Digital I O 13 17 Digital I O 14 18 Digital I O 15 19 D...

Page 67: ...CBR 2004B Paddleboard EPM 31 Hardware Reference Manual 66 Dimensions and Mounting Holes Figure 34 CBR 2004B Dimensions and Mounting Holes...

Page 68: ...ed at or below the maximum specified 85 C The heat plate is designed with the assumption that the user s thermal solution will maintain the top surface of the heat plate at 90 C or less If that temper...

Page 69: ...meters per second as described in the section titled EPM 31 Thermal Characterization beginning on page 71 within the enclosure Position the EPM 31 board to allow for convective airflow Lower the syste...

Page 70: ...value in the BIOS Setup program for this trip point is 55 C 2 The default value in the BIOS Setup program for this trip point is 105 C 3 The default value in the BIOS Setup program for this trip point...

Page 71: ...EPM 31 needs to be maintained at 85 C or below This includes the space between this CPU board and any board it is stacked on top of it Included is the space beneath an installed Mini PCIe expansion bo...

Page 72: ...et ports Three USB 2 0 ports in loopback configuration BIOS ID string BayCat_3 1 0 334 r1 101 Passive thermal trip point setting 105 C Critical thermal trip point setting 110 C Operating system Micros...

Page 73: ...Scenario 1 Single Core EPM 31EAP HDW 412 Heat Sink At 90 CPU utilization this single core unit operates within the CPU s core temperature safe operating range all the way up to 85 C using only a heat...

Page 74: ...eat sink the core temperature is slightly above 100 C at maximum ambient temperature This will be less in most applications that require less than 90 CPU utilization Adding the fan provides an additio...

Page 75: ...Quad Core EPM 31ECP HDW 412 Heat Sink with without HDW 407 Fan As shown below the quad core version of the BayCat will typically require a heat sink fan for operation above 80 C at 90 CPU utilization...

Page 76: ...INK Install the passive heat sink VL HDW 412 using these steps 1 Apply the Arctic Silver Thermal Compound Apply the thermal compound to the heat plate using the method described on the Arctic Silver w...

Page 77: ...so that its power cable is on the side nearest the J24 CPU fan connector The CPU fan connector is located between the Mini DisplayPort connector and the microSD socket see Figure 2 on page 12 2 Secure...

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