VersaLogic SPX-2, Reference Manual

Page: 13 / 17

Digital I/O
SPX Reference Manual
9
For more detailed information on the D
IGITAL
I/O P
ORT
C
ONFIGURATION
The 16 I/O pins are grouped into two 8-bit sets (GPIOA and GPIOB) within the MCP23S17. See
the Base Board SPI Registers appendix at the end of this document and the
paged I/O registers accessible through SPI. These registers control settings such as signal
direction, input polarity, and interrupt source. The 16 port pins on the SPX-2 use the slave select
configured by the jumper setting at jumper block V1.
I
NTERRUPT
G
ENERATION
The SPX-2 digital I/O can be configured to issue hardware interrupts on the transition (high to
low or low to high) of any SPX-2 I/O pin. IRQ assignment is made in base board SPI control
register SPISTATUS. Note that this IRQ is shared among all SPI devices on-board and externally
connected to the base board. The IRQ is also shared with the PC/104 bus and must be enabled in
CMOS for ISA IRQx. SPX-2 I/O chip interrupt configuration is achieved through I/O chip
register settings. Please refer to the
for more information.
The base board’s (EBX-11 and EBX-22) on-board digital I/O chips must be configured for open-
drain and mirrored interrupts in order for any SPI device to use hardware interrupts. See the base
board’s reference manual for instructions. Note that the SPX-2 interrupts should be configured as
mirrored, but not open-drain.
W
RITING TO A
D
IGITAL
I/O P
ORT
The SPX-2 can take advantage of the EBX-11 Rev 6 and above as well as the EBX-22 Rev 3 and
above data streaming capability. See the MCP23S17 datasheet for information on Sequential
Mode. The following code example initiates a write of 55h to SPX-2 I/O port bits GPA7-GPA0
using the standard 24-bit SPI frame with auto slave select. The SPX-2 is configured for SS0#.
;Write 40h to configure MCP23S17 register IOCON
MOV
DX, 1D8h
MOV AL, 21h ;SPICONTROL: SPI Mode 00, 24bit, auto SS0#
OUT DX, AL
MOV DX, 1D9h
MOV AL, 30h ;SPISTATUS: 8MHz, no IRQ, left-shift
OUT DX, AL
MOV DX, 1DBh
MOV AL, 40h ;SPIDATA1: mirror interrupts
OUT DX, AL
MOV DX, 1DCh
MOV AL, 0Ah ;SPIDATA2: MCP23S17 IOCON register address 0Ah
OUT DX, AL
MOV DX, 1DDh
MOV AL, 40h ;SPIDATA3: MCP23S17 write command
OUT DX, AL
CALL BUSY ;Poll busy flag to wait for SPI transaction
;Configure MCP23S17 register IODIRA for outputs
MOV
DX, 1DBh
MOV AL, 00h ;SPIDATA1: 00h for outputs
OUT DX, AL
MOV DX, 1DCh