
Multi-purpose I/O
VL-EPU-4562/4462 Reference Manual
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Analog-to-Digital and Digital to Analog Converter Interface
The Analog-to-Digital and Digital to Analog converter interface provides eight single-ended
analog input channels. The figure below shows the location and pin orientation of the Analog-to-
Digital and Digital to Analog connector.
The 20-pin I/O connector (J30) incorporates 16 Digital I/O (DIO) lines that are independently
configurable as an input or output. DIO inputs can be set for normal or inverted level. DIO
outputs can be set to be normal HIGH or LOW state. There are pull-up resistors to +3.3 V on all
DIO lines. The pull-ups implemented — in the FPGA — can range in value from 20 kΩ to 40
kΩ. After reset, the DIO lines are set as inputs with pull-ups that will be detected as a HIGH state
to external equipment.
VersaLogic provides a set of application programming interface (API) calls for managing the
DIO lines. See the VersaAPI Support Page for information
Figure 17. Location and Pin Orientation of the Analog-to-Digital Input Connector