TOBY-L1 and MPCI-L1 series - System Integration Manual
UBX-13001482 - R04
Advance Information
System description
Page 28 of 90
Figure 15 describes the hardware reset (reboot) sequence of TOBY-L1 modules, with the following main phases:
•
RESET_N
pin set low for at least 1 second, causing module hardware shutdown.
•
PWR_ON
pin set low for at least 5 seconds, causing module switch-on (reboot) as described in Figure 10.
VCC
V_BCKP
RESET_N
PWR_ON
V_INT
Internal Reset
System State
BB Pads State
Operational
Operational
→
Tristate
OFF
ON
Internal Reset
Internal Reset
→
Operational
ON
Tristate
Operational
Start-up
event
Start of interface
configuration
PWR_ON
can be released
All interfaces
are configured
RESET_N
set low
RESET_N
can be released
5 s
1 s
Figure 15: TOBY-L1 hardware reset (reboot) sequence description
Figure 16 describes the hardware reset (reboot) sequence of MPCI-L1 modules, with the following main phases:
•
PERST#
pin set low for at least 1 second, causing module hardware reset (reboot).
3.3Vaux
PERST#
Internal Reset
System State
BB Pads State
Operational
Operational
→
Tristate
OFF
ON
Internal Reset
Internal Reset
→
Operational
ON
Tristate
Operational
Start of interface
configuration
All interfaces
are configured
PERST#
set low
PERST#
can be released
1 s
Figure 16: MPCI-L1 hardware reset (reboot) sequence description
