SARA-N2 / N3 series - System integration manual
UBX-17005143 - R13
Design-in
Page 44 of 95
C1-Public
2.3.3
Voltage selection of interfaces (VSEL)
2.3.3.1
Guidelines for VSEL circuit design
☞
The
VSEL
input pin is not available in SARA-N2 series modules.
The state of the
VSEL
input pin is used to configure the
V_INT
supply output and the voltage domain
for the generic digital interfaces of the SARA-N3 series modules (the UARTs, I2C, and GPIOs pins):
•
If the
VSEL
input pin is externally connected to GND, the digital I/O interfaces operate at 1.8 V
•
If the
VSEL
input pin is left unconnected, the digital I/O interfaces operate at 2.8 V
The operating voltage cannot be changed dynamically: the
VSEL
input pin configuration has to be set
before booting the SARA-N3 series modules and then it cannot be changed after switched on.
If digital I/O interfaces are intended to operate at 1.8 V, the
VSEL
pin must be connected to GND, as
described in
SARA-N3 series
21
VSEL
Figure 22: VSEL application circuit, configuring digital interfaces to operate at 1.8 V
If digital I/O interfaces are intended to operate at 2.8 V, the
VSEL
pin must be left unconnected, as
described in
SARA-N3 series
21
VSEL
Figure 23: VSEL application circuit, configuring digital interfaces to operate at 2.8 V
☞
The ESD sensitivity rating of the
VSEL
pin is 1 kV (Human Body Model according to JESD22-A114).
A higher protection level can be required if the line is externally accessible on the application board.
A higher protection level can be achieved by mounting an ESD protection (e.g. EPCOS
CA05P4S14THSG varistor array) close to accessible points.
2.3.3.2
Guidelines for VSEL layout design
There are no specific layout design recommendations for the
VSEL
input.
