LEA-6 / NEO-6 / MAX-6 - Hardware Integration Manual
UBX-14054794
Production Information
Hardware description
Page 12 of 85
1.6.3.1
Communicating to an I
2
C EEPROM with the GPS receiver as I
2
C master
Serial I
2
C memory can be connected to the DDC interface. This can be used to save configuration permanently. It
will automatically be recognized by firmware. The memory address must be set to 0b10100000 (0xA0) and the
size fixed to 4 kB.
Figure 4: Connecting external serial I
2
C memory used by the GPS receiver (see EEPROM data sheet for exact pin orientation)
Figure 5: Connecting external serial I
2
C memory used by external host (see data sheet for exact pin orientation)
Note that the case shown on Figure 4 is different than the case when EEPROM is present but used by external
host / CPU as indicated on Figure 5. This is allowed but precaution is required to ensure that the GPS receiver
does not detect the EEPROM device, which would effectively configure the GPS receiver to be MASTER on the
bus causing collision with the external host.
To ensure that the EEPROM device (connected to the bus and used by the host) is not detected by the GPS
receiver it is important to set the EEPROM’s address to a value different than 0xA0. This way EEPROM remains
free to be used for other purposes and the GPS receiver will assume the SLAVE mode.
