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Ublox LISA-U200 FOTA, Integration Manual

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LISA-U2 series - System Integration Manual 

UBX-13001118 - R19 

Early Production Information 

Appendix  

 

 

Page 163 of 175

 

 
The 5 pins of the SPI / IPC Serial Interface can be configured as GPIOs on LISA-U2 series. 
 
The DDC (I

2

C) interface of LISA-U2 series modules can be used to communicate with u-blox GNSS receivers and 

at the same time to control an external audio codec. The LISA-U2 series module acts as an I

2

C master which can 

communicate to two I

2

C slaves as allowed by 

I

2

C bus specifications

 [8]. 

 
LISA-U2 modules provide additional GPIO functions: Module Status and Operating Mode Indications. 
 
LISA-U2  modules  are  SMT  modules  and  share  the  same  compact  form  factor  as  the  LISA-U1  series,  featuring 
Leadless Chip Carrier (LCC) packaging technology. 
An  additional  signal  keep-out  area  must  be  implemented  on  the  top  layer  of  the  application  board,  below 
LISA-U2 modules, due to the GND opening on module bottom layer. 
 
Detailed pinout and layout comparisons between LISA-U1 series and LISA-U2 series modules, with remarks for 
migration, are provided in the subsections A.3.2 and A.3.3. 
For  more  information  about  the  electrical  characteristics  of  the  LISA-U1  and  LISA-U2  series  modules,  see  the 

LISA-U1 series Data Sheet

 [29] and 

LISA-U2 series Data Sheet

 [1]. 

 

A.3.2

 

Pin-out comparison LISA-U1 series vs. LISA-U2 series 

65

64
63

62

61
60

59

58
57

56

55
54

53

52
51

50

49
48

47

46
45

44

43
42

41

GND

VCC

VCC
VCC

GND

SPI_MRDY

SPI_SRDY
SPI_MISO

SPI_MOSI

SPI_SCLK

RSVD / SPK_N

GND

RSVD / SPK_P

RSVD

GPIO5

VSIM

SIM_RST

SIM_IO

SIM_CLK

SDA

SCL

RSVD / I2S_RXD

RSVD / I2S_CLK

RSVD / I2S_TXD

RSVD / I2S_WA

1
2
3
4

5
6

7
8
9

10
11

12
13
14
15
16

17

18
19
20
21
22

23

24

25

V_BCKP

GND
V_INT
RSVD
GND

GND
GND

DSR
RI

DCD
DTR

GND

RTS
CTS
TXD

RXD

GND
VUSB_DET
PWR_ON

GPIO1

GPIO2

RESET_N
GPIO3

GPIO4
GND

26
27

USB_D-
USB_D+

40

39

RSVD / MIC_P

RSVD / MIC_N

28

29

30

31

32

33

34

35

36

37

38

76

75

74

73

72

71

70

69

68

67

66

GND

R

SV

D

GND

GND

GND

GND

GND

ANT

GND

GND

GND

LISA-U1

Top View

Pin 28…38 = GND

RSVD

Analog 

Audio

SPI

RSVD

 

Figure 77: LISA-U1 series pin assignment 

65

64

63

62

61

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

GND

VCC

VCC

VCC

GND

SPI_MRDY / GPIO14

SPI_SRDY / GPIO13

SPI_MISO / GPIO12

SPI_MOSI / GPIO11

SPI_SCLK / GPIO10

GPIO9 / I2S1_WA

GND

GPIO8 / I2S1_CLK

RSVD / CODEC_CLK

GPIO5

VSIM

SIM_RST

SIM_IO

SIM_CLK

SDA

SCL

RSVD / I2S_RXD

RSVD / I2S_CLK

RSVD / I2S_TXD

RSVD / I2S_WA

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

V_BCKP

GND

V_INT

RSVD

GND

GND

GND

DSR

RI

DCD

DTR

GND

RTS

CTS

TXD

RXD

GND

VUSB_DET

PWR_ON

GPIO1

GPIO2

RESET_N

GPIO3

GPIO4

GND

26

27

USB_D-

USB_D+

40

39

GPIO7 / I2S1_TXD

GPIO6 / I2S1_RXD

28

29

30

31

32

33

34

35

36

37

38

76

75

74

73

72

71

70

69

68

67

66

GND

R

SV

D /

 AN

T_

DIV

GND

GND

GND

GND

GND

ANT

GND

GND

GND

LISA-U2

Top View

Pin 28…38 = GND

Clock 

Out

Digital 

Audio 

or 

GPIO

Rx Div

SPI 

or 

GPIO

 

Figure 78: LISA-U2 series pin assignment  
(highlighted name/function changes) 

 

Summary of Contents for LISA-U200 FOTA

Page 1: ...bes the features and the system integration of LISA U2 series HSPA cellular modules These modules are complete and cost efficient 3 75G solutions offering up to six band HSDPA HSUPA and quad band GSM EGPRS voice and or data transmission technology in a compact form factor www u blox com UBX 13001118 R19 ...

Page 2: ...9 LISA U200 83S 00 23 41 A01 01 UBX 15020745 LISA U201 LISA U201 03S 00 23 41 A01 01 UBX 15020745 LISA U230 LISA U230 01S 00 22 40 UBX TN 12040 LISA U260 LISA U260 01S 00 22 61 UBX TN 12061 LISA U260 02S 00 22 90 UBX 13003492 LISA U270 LISA U270 01S 00 22 61 UBX TN 12061 LISA U270 02S 00 22 90 UBX 13003492 LISA U270 62S 00 22 90 UBX 13003492 LISA U270 68S 00 22 93 A01 03 UBX 15019240 u blox reserv...

Page 3: ... Manual provides hardware design instructions and information on how to set up production and final product tests Application Note document provides general design instructions and information that applies to all u blox Cellular modules See Related documents for a list of Application Notes related to your Cellular Module Questions If you have any questions about u blox Cellular Integration please ...

Page 4: ...SIM application circuits 46 1 9 Serial communication 52 1 9 1 Serial interfaces configuration 53 1 9 2 Asynchronous serial interface UART 54 1 9 3 USB interface 73 1 9 4 SPI interface 78 1 9 5 MUX Protocol 3GPP 27 010 83 1 10 DDC I 2 C interface 84 1 10 1 Overview 84 1 10 2 DDC application circuits 84 1 11 Audio Interface 89 1 11 1 I 2 S interface PCM mode 90 1 11 2 I 2 S interface Normal I 2 S mo...

Page 5: ...unctionality 134 2 5 ESD guidelines 135 2 5 1 ESD immunity test overview 135 2 5 2 ESD immunity test of u blox LISA U2 series reference designs 136 2 5 3 ESD application circuits 137 3 Features description 140 3 1 Network indication 140 3 2 Antenna detection 140 3 3 Jamming Detection 140 3 4 TCP IP and UDP IP 141 3 4 1 Multiple PDP contexts and sockets 141 3 5 FTP 141 3 6 HTTP 141 3 7 SSL TLS 142 ...

Page 6: ...9 Conformal coating 155 4 2 10 Casting 156 4 2 11 Grounding metal covers 156 4 2 12 Use of ultrasonic processes 156 5 Product Testing 157 5 1 u blox in series production test 157 5 2 Test parameters for OEM manufacturer 157 5 2 1 Go No go tests for integrated devices 158 5 2 2 Functional tests providing RF operation 158 Appendix 161 A Migration from LISA U1 to LISA U2 series 161 A 1 Checklist for ...

Page 7: ...GSM bands Power Class E2 26 dBm for DCS PCS bands PS Packet Switched Data Rate HSUPA category 6 up to 5 76 Mb s UL HSDPA category 8 up to 7 2 Mb s DL for LISA U200 LISA U201 LISA U260 and LISA U270 HSDPA category 14 up to 21 1 Mb s DL for LISA U230 WCDMA PS data up to 384 kb s DL UL PS Packet Switched Data Rate GPRS multislot class 123 coding scheme CS1 CS4 up to 85 6 kb s DL UL EDGE multislot cla...

Page 8: ...he number of timeslots used for reception or transmission voice calls take precedence over GPRS EGPRS traffic and channel encoding from Coding Scheme 1 up to Modulation and Coding Scheme 9 performing link adaptation to achieve the highest possible data rate Table 2 summarizes the interfaces and features provided by LISA U2 modules Model UMTS Bands Interfaces Audio Functions Grade HSUPA Mb s HSDPA ...

Page 9: ...ted to the main antenna switch which dispatches the RF signals according to the active mode For time duplex 2G operation the incoming signal at the active Receiver RX slot is applied by the main antenna switch to the duplexer SAW filter bank for out of band rejection and then sent to the appropriate receiver port of the RF transceiver During the allocated Transmitter TX slots the low level signal ...

Page 10: ...ls to the dedicated SAW filter bank for out of band rejection and then to the diversity receiver port of the RF transceiver In all the modes a fractional N sigma delta RF synthesizer and an on chip 3 296 4 340 GHz voltage controlled oscillator are used to generate the local oscillator signal The frequency reference to RF oscillators is provided by the 26 MHz VC TCXO The same signal is buffered to ...

Page 11: ...ound connection can improve RF performance all GND pins must be externally connected to ground V_BCKP All 2 I O Real Time Clock supply input output V_BCKP 1 8 V typical generated by the module when VCC supply voltage is within valid operating range See section 1 5 4 V_INT All 4 O Digital Interfaces supply output V_INT 1 8V typical generated by the module when it is switched on and the RESET_N exte...

Page 12: ...line Fixed open drain External pull up required See section 1 10 UART RxD All 16 O UART data output Circuit 104 RxD in ITU T V 24 Provide access to the pin for FW update and debugging if the USB interface is connected to the application processor See section 1 9 2 TxD All 15 I UART data input Circuit 103 TxD in ITU T V 24 Internal active pull up to V_INT 1 8 V enabled Provide access to the pin for...

Page 13: ...the application processor See section 1 9 3 USB_D All 26 I O USB Data Line D 90 Ω nominal differential impedance Z0 30 Ω nominal common mode impedance ZCM Pull up or pull down resistors and external series resistors as required by USB 2 0 specifications 7 are part of the USB pad driver and need not be provided externally Provide access to the pin for FW update and debugging if the USB interface is...

Page 14: ...See section 1 11 I2S1_CLK All 53 I O Second I2 S clock Check device specifications to ensure compatibility to module supported modes See section 1 11 I2S1_RXD All 39 I Second I2 S receive data Internal active pull down to GND enabled Check device specifications to ensure compatibility to module supported modes See section 1 11 I2S1_TXD All 40 O Second I2 S transmit data Check device specifications...

Page 15: ...reset RTC alarm see 1 6 1 module switches from power off to active mode When VCC supply is removed the module switches from power off mode to not powered mode Idle Application interfaces are disabled the module does not accept data signals from an external device connected to the module The module automatically enters idle mode whenever possible if power saving is enabled by AT UPSV see u blox AT ...

Page 16: ...dule is prepared to accept data from an external device unless power saving configuration is enabled by AT UPSV see 1 9 2 3 1 9 3 2 1 9 4 2 and u blox AT Commands Manual 2 When a voice call or a data call is initiated the module enters connected mode from active mode If power saving configuration is enabled by the AT UPSV command the module automatically switches from connected to idle mode whenev...

Page 17: ...utilizing a power efficient circuit topology Figure 3 and by power management software controlling the module s power saving mode Baseband Processor 2G 3G Power Amplifier s Switching Step Down 5 x 10 µF 61 VCC 62 VCC 63 VCC 50 VSIM 2 V_BCKP 4 V_INT Linear LDO Linear LDO Switching Step Down Linear LDO Linear LDO Linear LDO I O EBU CORE Analog SIM RTC NOR Flash DDR SRAM RF Transceiver Memory Power M...

Page 18: ...e for system start up and system reset control 1 5 2 Module supply VCC The LISA U2 series modules must be supplied through the VCC pins by a DC power supply Voltages must be stable during operation the current drawn from VCC can vary by some orders of magnitude especially due to surging consumption profile of the GSM system described in the section 1 5 3 It is important that the system power suppl...

Page 19: ...aximum peaks of 2 5 A in case of a mismatched antenna load Operation above the normal operating range maximum limit is not recommended and extended exposure beyond it may affect device reliability Stress beyond the VCC absolute maximum ratings can cause permanent damage to the module if necessary voltage spikes beyond VCC absolute maximum ratings must be restricted to values within the specified l...

Page 20: ...hoice when the available primary supply source has a nominal voltage much higher e g greater than 5 V than the LISA U2 series modules operating supply voltage The use of switching step down provides the best power efficiency for the overall application and minimizes current drawn from the main supply source The use of an LDO linear regulator becomes convenient for a primary supply with a relativel...

Page 21: ...mance and for smaller applications select a switching frequency 600 kHz since L C output filter is typically smaller for high switching frequency The use of a switching regulator with a variable switching frequency or with a switching frequency lower than 600 kHz must be carefully evaluated since this can produce noise in the VCC voltage profile and therefore negatively impact GSM modulation spect...

Page 22: ...pacitor Tantalum D_SIZE 6 3 V 45 mΩ T520D337M006ATE045 KEMET D1 Schottky Diode 40 V 3 A MBRA340T3G ON Semiconductor L1 10 µH Inductor 744066100 30 3 6 A 744066100 Wurth Electronics R1 470 kΩ Resistor 0402 5 0 1 W 2322 705 87474 L Yageo R2 15 kΩ Resistor 0402 5 0 1 W 2322 705 87153 L Yageo R3 22 kΩ Resistor 0402 5 0 1 W 2322 705 87223 L Yageo R4 390 kΩ Resistor 0402 1 0 063 W RC0402FR 07390KL Yageo...

Page 23: ...O linear regulator with its output circuit must be capable of providing a proper voltage value to the VCC pins and of delivering 2 5 A current pulses with 1 8 duty cycle Power dissipation the power handling capability of the LDO linear regulator must be checked to limit its junction temperature to the maximum rated operating range i e check the voltage drop from the max input voltage to the min ou...

Page 24: ... cycle to the VCC pins and must be capable of delivering a DC current greater than the module maximum average current consumption to VCC pins The maximum pulse discharge current and the maximum DC discharge current are not always reported in battery data sheets but the maximum DC discharge current is typically almost equal to the battery capacity in Amp hours divided by 1 hour DC series resistance...

Page 25: ... in Figure 9 to filter EMI in all the GSM UMTS bands 68 pF capacitor with Self Resonant Frequency in the 800 900 MHz range e g Murata GRM1555C1H680J at the VCC line where it narrows close to the module see Figure 9 to filter EMI in lower bands 15 pF capacitor with Self Resonant Frequency in 1800 1900 MHz range e g Murata GRM1555C1H150J at the VCC line where it narrows close to the module see Figur...

Page 26: ...nitor the battery temperature to protect the battery from operating under unsafe thermal conditions Alternatively the L6924U providing input voltage range up to 12 V can charge from an AC wall adapter When a current limited adapter is used it can operate in quasi pulse mode reducing power dissipation GND LISA U2 series 62 VCC 63 VCC 61 VCC C8 C7 C6 C5 USB Supply C3 R4 θ U1 IUSB IAC IEND TPRG SD VI...

Page 27: ...ighly unmatched antenna for 576 9 µs width of the transmit slot burst with a periodicity of 4 615 ms width of 1 frame 8 slots burst so with a 1 8 duty cycle according to GSM TDMA Time Division Multiple Access If the module is in GSM connected mode in the DCS 1800 or in the PCS 1900 band the current consumption figures are lower than the one in the GSM 850 or in the E GSM 900 band due to 3GPP trans...

Page 28: ... 615 ms width of 1 frame 8 slots bursts so with a 1 2 duty cycle according to GSM TDMA If the module is in GPRS connected mode in the DCS 1800 or in the PCS 1900 band the current consumption figures are lower than in the GSM 850 or in the E GSM 900 band due to 3GPP transmitter output power specifications see LISA U2 series Data Sheet 1 Figure 12 reports the current consumption profiles in GPRS cla...

Page 29: ... or 24 dBm the current drawn by the module at the VCC pins is in the order of continuous 500 800 mA see LISA U2 series Data Sheet 1 for detailed values Even at lowest output RF power approximately 0 01 µW or 50 dBm the current still remains in the order of 200 mA due to module baseband processing and transceiver activity An example of current consumption profile of the data module in UMTS HSxPA co...

Page 30: ...ock receptions is defined by the network 2G or 3G This is the paging period parameter fixed by the base station through broadcast channel sent to all users on the same serving cell In case of 2G network the time interval between two paging block receptions can be from 470 76 ms DRX 2 i e width of 2 GSM multiframes 2 x 51 GSM frames 2 x 51 x 4 615 ms up to 2118 42 ms DRX 9 i e width of 9 GSM multif...

Page 31: ...he 26 MHz reference clock frequency is used An example of the current consumption profile of the data module when power saving is disabled is shown in Figure 15 the module is registered with the network active mode is maintained and the receiver and the DSP are periodically activated to monitor the paging channel for paging block reception ACTIVE MODE 2G case 0 47 2 12 s 3G case 0 64 5 12 s Paging...

Page 32: ...de periods between network paging but is able to provide programmable alarm functions by means of the internal 32 768 kHz clock The RTC can be supplied from an external back up battery through the V_BCKP when the main voltage supply is not provided to the module through VCC This lets the time reference date and time run until the V_BCKP voltage is within its valid range even when the main supply i...

Page 33: ...ed at V_BCKP with a 4 7 k series resistor to hold the V_BCKP voltage within its valid range for approximately 10 hours at 25 C after the VCC supply is removed The purpose of the series resistor is to limit the capacitor charging current due to the large capacitor specifications and also to let a fast rise time of the voltage value at the V_BCKP pin after VCC supply has been provided These capacito...

Page 34: ...he cellular module In this case the V_BCKP supply output of the LISA U2 series cellular module can be connected to the V_BCKP backup supply input pin of the GNSS receiver to provide the supply for the GNSS real time clock and backup RAM when the VCC supply of the cellular module is within its operating range and the VCC supply of the GNSS receiver is disabled This enables the u blox GNSS receiver ...

Page 35: ...vel could be required if the line is externally accessible on the application board Higher protection level can be achieved by mounting an ESD protection e g EPCOS CA05P4S14THSG varistor array on the line connected to this pin close to accessible point Since it supplies internal digital circuits see Figure 3 V_INT is not suited to directly supply any sensitive analog circuit the voltage ripple can...

Page 36: ... Power on input PWR_ON pin has high input impedance Do not keep floating in noisy environment external pull up required Table 16 Power on pin The PWR_ON pin ESD sensitivity rating is 1 kV Human Body Model according to JESD22 A114F Higher protection level could be required if the line is externally accessible on the application board Higher protection level can be achieved by mounting an ESD protec...

Page 37: ..._ON input to an external device e g application processor use an open drain output on the external device with an external pull up resistor e g 100 kΩ biased by V_BCKP supply pin of the module A push pull output of an application processor can also be used in this case the pull up can be used to pull the PWR_ON level high when the application processor is switched off If the high level voltage of ...

Page 38: ... output can be directly connected without any external pull up A push pull output can be used too in this case make sure that the high level voltage of the push pull circuit is below the maximum voltage operating range of the RESET_N pin specified in the RESET_N pin characteristics table in LISA U2 series Data Sheet 1 To avoid unwanted power on or reset of the module make sure to fix the proper le...

Page 39: ...in generic digital interfaces 3 s typical and USB interface due to specific host device enumeration timings 5 s typical see the section 1 9 3 1 The host application processor should not send any AT command over the AT interfaces USB UART of the modules until the end of these interfaces configuration phase to allow a proper boot of the module After the interfaces configuration phase the application...

Page 40: ...current parameter settings are not saved in the module s non volatile memory and a proper network detach cannot be performed It is highly recommended to avoid an abrupt removal of the VCC supply the power off sequence of the module must be properly started as described above e g by means of the AT CPWROFF command and a proper VCC supply must be maintained at least until the end of the power off se...

Page 41: ...switch off routines can largely vary from the values reported in Figure 19 e g from tens of milliseconds up to tens of seconds depending on the application network settings and the concurrent module activities If the AT command CPWROFF is issued to switch off the module over a multiplexer channel the completion of the module power off sequence could require additionally up to 2 5 s after the modul...

Page 42: ...nal or hardware reset of the module with an asynchronous abrupt reset of the entire module including the integrated Power Management Unit except for the RTC internal block The V_INT interfaces supply is switched off and all the digital pins of the modules are tri stated but the V_BCKP supply and the RTC block are enabled Forcing an external or hardware reset the current parameter settings are not ...

Page 43: ...ESD Open Drain Output Application processor LISA U2 series 2 V_BCKP 22 RESET_N Rint Rint EMI1 C1 EMI2 C3 C2 C4 Figure 20 RESET_N application circuits using a push button and an open drain output of an application processor Reference Description Remarks ESD Varistor for ESD protection CT0402S14AHSG EPCOS C1 C3 47 pF Capacitor Ceramic C0G 0402 5 50 V GRM1555C1H470JA01 Murata C2 C4 220 nF Capacitor C...

Page 44: ... Antenna pins ESD immunity rating of ANT port is 1000 V according to IEC 61000 4 2 Higher protection level could be required if the line is externally accessible on the application board for further details see section 2 5 3 Choose an antenna with optimal radiating characteristics for the best electrical performance and overall module functionality An internal antenna integrated on the application...

Page 45: ...he lines are connected to an SIM card connector since they are externally accessible on the application board For more details about the general precautions for ESD immunity about SIM interface pins see section 2 5 3 The following SIM services are supported Abbreviated Dialing Numbers ADN Fixed Dialing Numbers FDN Last Dialed Numbers LDN Service Dialing Numbers SDN SIM Application Toolkit and USIM...

Page 46: ...or applications where the SIM changing is required during the product lifetime A SIM card holder can have 6 or 8 positions if a mechanical card presence detector is not provided or it can have 6 2 or 8 2 positions if two additional pins corresponding to the normally open mechanical switch integrated in the SIM connector for the mechanical card presence detection are provided select a SIM connector...

Page 47: ...capacitance i e less than 10 pF ESD protection e g Tyco Electronics PESD0402 140 on each externally accessible SIM line close to each specific pad of the SIM connector ESD sensitivity rating of the SIM interface pins is 1 kV Human Body Model according to JESD22 A114 so that according to the EMC ESD requirements of the custom application higher protection level can be required if the lines are exte...

Page 48: ...rise time on the SIM_CLK line 1 0 µs is the maximum allowed rise time on the SIM_IO and SIM_RST lines LISA U2 series 50 VSIM 48 SIM_IO 47 SIM_CLK 49 SIM_RST 4 V_INT 51 GPIO5 SIM CHIP SIM Chip Bottom View contacts side C1 VPP C6 VCC C1 IO C7 CLK C3 RST C2 GND C5 C2 C3 C5 U1 C4 2 8 3 6 7 1 C1 C5 C2 C6 C3 C7 C4 C8 8 7 6 5 1 2 3 4 Figure 22 Application circuit for the connection to a single solderable...

Page 49: ...rovide a very low capacitance i e less than 10 pF ESD protection e g Tyco Electronics PESD0402 140 on each externally accessible SIM line close to each specific pad of the SIM connector ESD sensitivity rating of the SIM interface pins is 1 kV Human Body Model according to JESD22 A114 so that according to the EMC ESD requirements of the custom application higher protection level can be required if ...

Page 50: ...ase of four SIM circuits using a proper 4 pole 4 throw switch or alternatively four 1 pole 4 throw switches instead of the suggested 4 pole 2 throw switch Follow these guidelines connecting the module to two SIM connectors Use a proper low on resistance i e few ohms and low on capacitance i e few pF 2 throw analog switch e g Fairchild FSA2567 as SIM switch to ensure high speed data transfer accord...

Page 51: ...onnection to two removable SIM cards with SIM detection implemented Reference Description Part Number Manufacturer C1 C4 C6 C9 33 pF Capacitor Ceramic C0G 0402 5 25 V GRM1555C1H330JZ01 Murata C5 C10 C11 100 nF Capacitor Ceramic X7R 0402 10 16 V GRM155R71C104KA01 Murata D1 D8 Very Low Capacitance ESD Protection PESD0402 140 Tyco Electronics R1 47 kΩ Resistor 0402 5 0 1 W RC0402JR 0747KL Yageo Phyco...

Page 52: ...ed with AT commands according to 3GPP TS 27 007 4 AT commands according to 3GPP TS 27 005 5 AT commands according to 3GPP TS 27 010 6 u blox AT commands For the complete list of supported AT commands and their syntax see u blox AT Commands Manual 2 The module firmware can be upgraded over all the serial interfaces listed above by means of AT command for more details see section 3 1 as well as the ...

Page 53: ...se USB interface Enabled 6 CDCs are available configured as described in the following list USB1 AT commands data connection USB2 AT commands data connection USB3 AT commands data connection USB4 GPS tunneling USB5 Primary TraceLog USB6 Secondary TraceLog USB7 SAP SIM Access Profile AT K3 HW flow control enabled AT S1 DSR line set ON in data mode and set OFF in command mode5 AT D1 Upon an ON to OF...

Page 54: ...e conform to the ITU T V 24 Recommendation 3 UART interfaces include the following lines Name Description Remarks DSR Data set ready Module output Circuit 107 Data set ready in ITU T V 24 RI Ring Indicator Module output Circuit 125 Calling indicator in ITU T V 24 DCD Data carrier detect Module output Circuit 109 Data channel received line signal detector in ITU T V 24 DTR Data terminal ready Modul...

Page 55: ...e the first command sent from the DTE at any rate can be AT CPIN 1234 Characters different than AT are ignored during the baud rate detection since the at or AT sequence triggers the hardware detection sequence At or aT sequences are invalid both detection characters must be lowercase or uppercase The module generates a response for the DTE once autobauding detection is successful the command is a...

Page 56: ...abled by default as the one shot autobauding The following frame formats can be configured by AT command 8N1 8 data bits No parity 1 stop bit default frame configuration with fixed baud rate 8E1 8 data bits even parity 1 stop bit 8O1 8 data bits odd parity 1 stop bit 8N2 8 data bits No parity 2 stop bits 7E1 7 data bits even parity 1 stop bit 7O1 7 data bits odd parity 1 stop bit The 8N2 frame for...

Page 57: ...is enabled as it is by default the CTS line indicates when the UART interface is enabled data can be sent and received The module drives the CTS line to the ON state or to the OFF state when it is either able or not able to accept data from the DTE over the UART see 1 9 2 3 for more details If hardware flow control is enabled then when the CTS line is OFF it does not necessarily mean that the modu...

Page 58: ...controlled by the RTS input line see section 1 9 2 3 and u blox AT Commands Manual 2 AT UPSV command DSR signal behavior If AT S0 is set the DSR module output line is set by default to ON state low level at UART initialization and is then always held in the ON state If AT S1 is set the DSR module output line is set by default to OFF state high level at UART initialization The DSR line is then set ...

Page 59: ...the reliable RLP protocol When the remote DCE accepts the data call the module DCD line is set to ON and the CONNECT communication baudrate string is returned by the module At this stage the DTE can send characters through the serial line to the data module which sends them through the network to the remote DCE attached to a remote DTE In case of a voice call DCD is set to ON state on all the seri...

Page 60: ...eral events occur coincidently or in quick succession each event triggers the RI line independently although the line will not be deactivated between each event As a result the RI line may stay to ON for more than 1 s If an incoming call is answered within less than 1 s with ATA or if autoanswering is set to ATS0 1 than the RI line will be set to OFF earlier As a result RI line monitoring cannot b...

Page 61: ...status is summarized in Table 28 For more details on the UPSV AT command description see the u blox AT commands Manual 2 AT UPSV HW flow control RTS line DTR line Communication during idle mode and wake up 0 Enabled AT K3 ON ON or OFF Data sent by the DTE is correctly received by the module Data sent by the module is correctly received by the DTE 0 Enabled AT K3 OFF ON or OFF Data sent by the DTE ...

Page 62: ...DTE is lost by the module Data sent by the module is correctly received by the DTE if it is ready to receive data otherwise data is lost Table 28 UART and power saving summary AT UPSV 0 power saving disabled fixed active mode The module does not enter idle mode and the UART interface is enabled data can be sent and received the CTS line is always held in the ON state after UART initialization This...

Page 63: ... sent the UART is disabled for 2 5 s and afterwards the interface is enabled again The module active mode duration outside an active call depends on Network parameters related to the time interval for the paging block reception minimum of 11 ms Duration of UART enable time in absence of data reception 20 ms The time period from the last data received at the serial port during the active mode the m...

Page 64: ...line is set to OFF but the UART is enabled in case the module needs to transmit some data over the UART e g URC When an OFF to ON transition occurs on the DTR input line the UART is re enabled and the module if it was in idle mode switches from idle to active mode after 20 ms this is the UART and module wake up time If the DTR line is set to ON by the DTE the module is not allowed to enter idle mo...

Page 65: ...000 Hardware flow control is disabled Figure 29 shows the case where the module UART is disabled and only a wake up is forced In this scenario the only character sent by the DTE is the wake up character as a consequence the DCE module UART is disabled when the timeout from last data received expires 2000 frames without data reception as the default case OFF ON DCE UART is enabled for 2000 GSM fram...

Page 66: ... if the module is in low power idle mode i e the module does not reply No wake up character or dummy AT is required from the DTE during a voice or data call since the module UART interface continues to be enabled and does not need to be woken up Furthermore in data mode 6 a dummy AT would affect the data communication Additional considerations The LISA U2 series modules are forced to stay in activ...

Page 67: ...10 RI 11 DCD GND 0 Ω 0 Ω TP TP 0 Ω 0 Ω TP TP Figure 31 UART interface application circuit with complete V 24 link in DTE DCE serial communication 1 8V DTE If a 3 0 V Application Processor is used appropriate unidirectional voltage translators must be provided using the module V_INT output as 1 8 V supply as described in Figure 32 4 V_INT TxD Application processor 3 0V DTE RxD RTS CTS DTR DSR RI DC...

Page 68: ...T interface application circuit with partial V 24 link 6 wire in the DTE DCE serial communication 1 8V DTE If a 3 0 V Application Processor is used appropriate unidirectional voltage translators must be provided using the module V_INT output pin as 1 8 V supply as described in Figure 34 given that the DTE will behave properly regardless DSR input setting 4 V_INT TxD Application processor 3 0V DTE ...

Page 69: ...he UART interface is enabled by the RTS line as described in section 1 9 2 3 reaching very low current consumption With this configuration when the module is in idle mode the UART is re enabled 20 ms after RTS has been set ON and the recognition of subsequent characters is guaranteed until the module is in active mode AT UPSV 3 the module automatically enters the low power idle mode whenever possi...

Page 70: ...is periodically enabled as described in section 1 9 2 3 reaching low current consumption With this configuration when the module is in idle mode data transmitted by the DTE will be buffered by the DTE and will be correctly received by the module when active mode is entered If the HW flow control is disabled AT K0 it is recommended to enable the power saving in this way AT UPSV 2 the module automat...

Page 71: ...1 DIR2 OE VCC B2 A2 RTS CTS 13 RTS 14 CTS 0 Ω TP TP Figure 38 UART interface application circuit with partial V 24 link 3 wire in DTE DCE serial communication 3 0 V DTE Reference Description Part Number Manufacturer C1 C2 100 nF Capacitor Ceramic X7R 0402 10 16 V GRM155R61A104KA01 Murata U1 Unidirectional Voltage Translator SN74AVC2T245 Texas Instruments Table 32 Component for UART application cir...

Page 72: ...pull up integrated at each input of the DTE if any and the baud rate required by the application for the appropriate selection of the resistance value for the external pull up biased by the application processor supply rail If the module USB interface is connected to the application processor it is highly recommended to provide direct access to RxD TxD CTS and RTS lines of the module for execution...

Page 73: ... if the lines are externally accessible on the application board Higher protection level can be achieved by mounting a very low capacitance i e less or equal to 1 pF ESD protection e g Tyco Electronics PESD0402 140 ESD protection device on the lines connected to these pins close to accessible points 1 9 3 1 USB features LISA U2 modules include a High Speed USB 2 0 compliant interface with maximum ...

Page 74: ... the USB interface provides 7 USB CDC ACM modem COM ports USB1 AT and data USB2 AT and data USB3 AT and data USB4 GNSS tunneling USB5 Primary Log diagnostic purpose USB6 Secondary Log diagnostic purpose USB7 SAP SIM Access Profile The user can concurrently use the AT command interface on one CDC and Packet Switched Circuit Switched Data communication on another CDC Figure 39 left side summarizes t...

Page 75: ...r Interrupt Interface 13 Data EndPoint Transfer Bulk EndPoint Transfer Bulk Function SAP Alternative profile configuration Interface 0 Abstract Control Model EndPoint Transfer Interrupt Interface 1 Data EndPoint Transfer Bulk EndPoint Transfer Bulk Function AT and Data Interface 2 Abstract Control Model EndPoint Transfer Interrupt Interface 3 Data EndPoint Transfer Bulk EndPoint Transfer Bulk Func...

Page 76: ...de therefore the AT UPSV settings are overruled but they have effect on the power saving configuration of the other interfaces The modules are capable of USB remote wake up signaling i e it may request the host to exit suspend mode or selective suspend by using electrical signaling to indicate remote wake up for example due to incoming call URCs data reception on a socket The remote wake up signal...

Page 77: ...ufacturer D1 D2 D3 Very Low Capacitance ESD Protection PESD0402 140 Tyco Electronics C2 100 nF Capacitor Ceramic X7R 0402 10 16 V GRM155R61A104KA01 Murata Table 34 Component for USB application circuit If the USB interface is not connected to the application processor it is highly recommended to provide direct access to the VUSB_DET USB_D USB_D lines for execution of firmware upgrade over USB usin...

Page 78: ... and Firmware Update application note 17 Name Description Remarks SPI_MISO SPI Data Line Master Input Slave Output Module Output Idle high Shift data on rising clock edge CPHA 1 Latch data on falling clock edge CPHA 1 MSB is shifted first SPI_MOSI SPI Data Line Master Output Slave Input Module Input Idle high Shift data on rising clock edge CPHA 1 Latch data on falling clock edge CPHA 1 MSB is shi...

Page 79: ... is used by the module baseband processor i e the slave to indicate to the application processor i e the master that it is ready to transmit or receive IPC slave ready signal and can also be used by the module baseband processor to wake up the application processor if it is in hibernation SPI_MRDY SPI_SRDY DATA_EXCHANGE SPI_MOSI SPI_MISO Header Data SPI_SCLK Figure 41 IPC Data Flow SPI_MRDY and SP...

Page 80: ...eader and data 4 If the data has been exchanged the slave deactivates SPI_SRDY to process the received information The master does not need to de assert SPI_MRDY as it controls the SPI_SCLK 5 After the preparation the slave activates again SPI_SRDY and wait for SPI_SCLK activation When the clock is active all the data is transferred without intervention If there is more data to transfer flag set i...

Page 81: ...mination that it is ready to start transmission again In this case the slave will raise SPI_SRDY again The SPI_MRDY line can be either high or low the master has only to ensure that the SPI_SRDY change will be detected correctly via interrupt For more details regarding IPC communication protocol see the SPI Application Note 18 1 9 4 4 IPC application circuits SPI_MOSI is the data line input for th...

Page 82: ...ter Application Processor is used implement a circuit with appropriate unidirectional voltage translators with tri state i e high impedance mode controlled by the application processor as described in Figure 46 4 V_INT MOSI Application processor 3 0V SPI master MISO SCLK Interrupt GND LISA U2 series 1 8V SPI slave 56 SPI_MOSI 57 SPI_MISO 55 SPI_SCLK 58 SPI_SRDY GND U1 VCC GPIO GPIO 59 SPI_MRDY 1V8...

Page 83: ...like framing and operates between the module DCE and the application processor DTE and allows a number of simultaneous sessions over the used physical link UART or SPI the user can concurrently use AT command interface on one MUX channel and Packet Switched Circuit Switched Data communication on another MUX channel The multiplexer protocol can be used on one serial interface UART or SPI at a time ...

Page 84: ... A 2 nd interface connected to the GNSS receiver is not necessary AT commands via the serial interfaces UART USB SPI of the cellular module allows a fully control of the GNSS receiver from any host processor LISA U2 modules feature embedded GPS aiding that is a set of specific features developed by u blox to enhance GNSS performance decreasing Time To First Fix TTFF thus allowing to calculate the ...

Page 85: ... up resistors and the bus capacitance Long wires on the bus will increase the capacitance If the bus capacitance is increased use pull up resistors with nominal resistance value lower than 4 7 k to match the I 2 C bus specifications 8 regarding rise and fall times of the signals Capacitance and series resistance must be limited on the bus to match the I 2 C specifications 1 0 µs is the maximum all...

Page 86: ...r connected to the cellular module The pin will be set as Output to provide an RTC synchronization signal to the u blox GNSS receiver for RTC sharing if the parameter mode of AT UGPS command is set to 1 and the parameter GPS_IO_configuration of UGPRF AT command is set to 32 Output Low otherwise default setting The pin that provides the GNSS RTC sharing function must be connected to the RTC synchro...

Page 87: ...S receiver of the u blox 6 generation or later u blox generation The V_INT supply is able to withstand the maximum current consumption of these positioning receivers The V_INT supply output provides low voltage ripple up to 15 mVpp when the module is in active mode or in connected mode but it provides higher voltage ripple up to 70 mVpp when the module is in the low power idle mode with power savi...

Page 88: ...INT 1 8 V cellular supply The V_BCKP supply output of the cellular module can be directly connected to the V_BCKP backup supply input pin of the GNSS receiver as in the application circuit for a u blox 1 8 V GNSS receiver LISA U2 series u blox GNSS 3 0 V receiver 23 GPIO3 24 GPIO4 1V8 B1 A1 GND U3 B2 A2 VCCB VCCA Unidirectional Voltage Translator C4 C5 3V0 TxD1 EXTINT0 R1 IN OUT GND GPS LDO Regula...

Page 89: ...s of the I 2 S digital audio interface are generated by the module In slave mode these signal must be generated by the remote device Table 40 lists the signals related to digital audio function Name Description Remarks I2S_TXD I2 S transmit data Module output I2S_RXD I2 S receive data Module input I2S_CLK I2 S clock Module output in master mode Module input in slave mode I2S_WA I2 S word alignment...

Page 90: ...ribed in the u blox AT Commands Manual 2 USGC UMGC USTN AT command Analog gain parameters are not used The I 2 S receive data input and the I 2 S transmit data output signals can use the following resources Digital filters and digital gains are available in both uplink and downlink direction They can be properly configured by the AT commands Ringer tone and service tone are mixed on the TX path wh...

Page 91: ...S AT command and the following parameters can be set MSB can be 1 bit delayed or non delayed on I 2 S word alignment edge I 2 S transmit data can change on rising or falling edge of I 2 S clock signal rising edge in this example I 2 S receive data are read on the opposite front of I 2 S clock signal 1 11 3 I2 S interface application circuits LISA U2 I 2 S digital audio interfaces can be connected ...

Page 92: ...Texas Instruments National Semiconductor Cirrus Logic Wolfson Microelectronics Nuvoton Technology Asahi Kasei Microdevices Realtek Semiconductor Figure 50 and Table 41 describe an application circuit for I 2 S digital audio interfaces of LISA U2 series modules providing voice capability using an external audio voice codec DAC and ADC integrated in the external audio codec respectively converts an ...

Page 93: ...F Capacitor Ceramic COG 0402 5 25 V GRM1555C1H270JZ01 Murata C11 C12 C13 C14 10 nF Capacitor Ceramic X5R 0402 10 50V GRM155R71C103KA88 Murata D1 D2 Low Capacitance ESD Protection USB0002RP or USB0002DP AVX EMI1 EMI2 EMI3 EMI4 Chip Ferrite Bead Noise EMI Suppression Filter 1800 Ohm at 100 MHz 2700 Ohm at 1 GHz BLM15HD182SN1 Murata J1 Microphone Connector Various manufacturers J2 Speaker Connector V...

Page 94: ...re connected by buffers circular buffer and voiceband sample buffer and sample rate converters for 8 16 to 47 6 kHz conversion The voiceband audio processing implemented in the DSP core of LISA U2 series modules is summarized in Figure 51 I2S_RXD Switch I2S1_RXD UBF 2 6 UBF 1 5 Hands free To Radio TX Uplink Digital Gain I2S1_TXD Switch I2S_TXD Scal_Rec Digital Gain Tone Generator I2Sx RX UBF 4 8 U...

Page 95: ...ds Function configurable via specific AT commands see the u blox AT Commands Manual 2 o Signal routing USPM command o Analog amplification Digital amplification USGC CLVL CRSL CMUT command o Digital filtering UUBF UDBF commands o Hands free algorithms echo cancellation Noise suppression Automatic Gain control UHFP command o Sidetone generation feedback of uplink speech signal to downlink path USTN...

Page 96: ...efault GPIO2 pin setting the parameter gpio_mode of AT UGPIOC command to 3 The GNSS supply enable mode can be provided only on one pin per time it is not possible to simultaneously set the same mode on another pin The pin configured to provide the GNSS supply enable function is set as o Output High to switch on the u blox GNSS receiver if the parameter mode of AT UGPS command is set to 1 o Output ...

Page 97: ...led low by the pull down when a SIM card is not inserted in the holder and will be pulled high by the pull up when a SIM card is present The GPIO5 pin is configured as an external interrupt to detect SIM card presence An Unsolicited Result Code URC can be generated each time that there is a change of status for more details see the simind value of the descr parameter of CIND and CMER commands in t...

Page 98: ...le operating mode indication function is set as o Output High when the module is in active or connected mode o Output Low when the module is in idle mode that can be reached if power saving is enabled by UPSV AT command for further details see the u blox AT Commands Manual 2 The Module operating mode indication mode can be provided only on one pin at a time it is not possible to simultaneously set...

Page 99: ...ll down enabled as a not used pin setting the parameter gpio_mode of UGPIOC AT command to 255 The Pad disabled mode can be provided on more than one pin per time it is possible to simultaneously set the same mode on another pin also on all the GPIOs The pin configured to provide the Pad disabled function is set as o Tri state with an internal active pull down enabled Table 42 describes the configu...

Page 100: ...ord alignment GPIO By default the pin is configured as 2nd I2 S word alignment input output Can be alternatively configured by the UGPIOC USPM commands as Output Input Pad disabled 55 SPI_SCLK GPIO10 SPI Serial Clock GPIO By default the pin is configured as SPI Serial Clock Input Idle low CPOL 0 Internal active pull down to GND enabled Can be alternatively configured by the UGPIOC command as Outpu...

Page 101: ...2 Network indication function provided by the GPIO1 pin GNSS supply enable function provided by the GPIO2 pin GNSS data ready function provided by the GPIO3 pin GNSS RTC sharing function provided by the GPIO4 pin SIM card detection function provided by the GPIO5 pin Use transistors with at least an integrated resistor in the base pin or otherwise put a 10 kΩ resistor on the board in series to the ...

Page 102: ...r 0402 5 0 1 W Various manufacturers U1 Voltage Regulator for GNSS receiver See GNSS Module Hardware Integration Manual R2 4 7 kΩ Resistor 0402 5 0 1 W Various manufacturers R3 1 kΩ Resistor 0402 5 0 1 W Various manufacturers R4 470 kΩ Resistor 0402 5 0 1 W Various manufacturers D1 ESD Transient Voltage Suppressor USB0002RP or USB0002DP AVX J1 SIM Card Holder CCM03 3013LFT R102 C K Components or e...

Page 103: ...put which provides module status indication to fix a low level at inverting transistor input when GPIO1 is floating i e when the module is switched off so that high logic level is present at the application processor input when the module is switched off and low logic level when the module is switched on i e the opposite logic level of the GPIO Input 1 8V V_BCKP 2 LISA U2 series Application proces...

Page 104: ...Antenna 1 8V DTE 1 8V SPI Master USB 2 0 Host 20 GPIO1 3V8 Network Indicator 22 RESET_N Ferrite Bead 47pF Application Processor Open Drain Output 19 PWR_ON 100kΩ Open Drain Output 0Ω 0Ω TP TP 0Ω 0Ω TP TP 1 8V Digital Audio Device I2S_RXD I2S_CLK I2S Data Output I2S Clock I2S_TXD I2S_WA I2S Data Input I2S Word Alligment 44 43 42 41 Rx Diversity Antenna LISA U230 only 47pF SIM Card Holder CCVCC C1 C...

Page 105: ...jor certification schemes the application device that integrates LISA U2 modules must be approved under all the certification schemes required by the specific application device to be deployed in the market The required certification scheme approvals and the related testing specifications differ depending on the country or the region where the device that integrates LISA U2 modules must be deploye...

Page 106: ...0682 and 1588 see the LISA U2 series Data Sheet 1 for a complete list of the Notified Body numbers used in the certification of each module 1 15 2 US Federal Communications Commission notice The Federal Communications Commission FCC IDs for the LISA U2 modules are LISA U200 XPYLISAU200 LISA U201 XPYLISAU201 LISA U230 XPYLISAU230 LISA U260 XPYLISAU200 LISA U270 XPYLISAU200 1 15 2 1 Safety warnings ...

Page 107: ... used for LISA U230 i e the combined transmission line connector cable losses and radiating element gain must not exceed 4 78 dBi in 850 MHz i e GSM 850 or UMTS FDD 5 band 7 55 dBi in 1700 MHz i e AWS or UMTS FDD 4 band and 3 95 dBi in 1900 MHz i e GSM 1900 or UMTS FDD 2 band for mobile and fixed or mobile operating configurations The gain of the system antenna s used for LISA U260 and LISA U270 i...

Page 108: ...rations The gain of the system antenna s used for LISA U201 i e the combined transmission line connector cable losses and radiating element gain must not exceed 0 7 dBi in 850 MHz i e GSM 850 or UMTS FDD 5 band and 3 5 dBi in 1900 MHz i e GSM 1900 or UMTS FDD 2 band for mobile and fixed or mobile operating configurations The gain of the system antenna s used for LISA U230 i e the combined transmis...

Page 109: ...ltel srch nwRdSrch do lang eng Additional Canadian information on RF exposure also can be found at the following web address http www ic gc ca eic site smt gst nsf eng sf08792 html IMPORTANT Manufacturers of portable applications incorporating the LISA U2 modules are required to have their final product certified and apply for their own Industry Canada Certificate related to the specific portable ...

Page 110: ...ligatoire afin d être en accord avec les exigences SAR pour les appareils portables Tout changement ou modification non expressément approuvé par la partie responsable de la certification peut annuler le droit d utiliser l équipement 1 15 4 ACMA Certification LISA U200 and LISA U230 modules are certified by the Australian Communications and Media Authority The ACMA recommends that telephones be ab...

Page 111: ...ons Commission KCC KCC ID for LISA U2 modules LISA U200 KCC CRM ULX LISA U200 LISA U270 KCC CRM ULX LISA U270 1 15 7 Anatel Certification LISA U200 modules are certified by the Brazilian Agency of Telecommunications Agência Nacional de Telecomunicações in Portuguese Anatel LISA U200 01 0 789 8941 57508 3 3309 12 8459 Anatel IDs for LISA U200 modules EAN barcode 01 0 789 8941 57508 3 Homologation n...

Page 112: ...ISA U270 68S are TELEC JATE certified and have the Giteki mark placed on the product label LISA U200 62S o Technical Conditions certified type number AD120274003 o Technical Requirements certified type number 003 120375 LISA U270 62S and LISA U270 68S o Technical Conditions certified type number AD120274003 o Technical Requirements certified type number 003 120377 0682 LISA U200 xxS xx AD120274003...

Page 113: ...TU T V 24 Recommendation 3 Provide appropriate access to USB interface and or to UART RxD TxD lines and access to PWR_ON and or RESET_N lines to flash upgrade the module firmware using the u blox EasyFlash tool Provide appropriate access to USB interface and or to UART RxD TxD CTS RTS lines for debugging Capacitance and series resistance must be limited on each line of the SPI IPC interface Add a ...

Page 114: ...placement for minimum length of RF line and closer path from DC source for VCC Design USB_D USB_D connection as 90 differential pair with 30 common mode impedance Keep routing short and minimize parasitic capacitance on the SPI lines to preserve signal integrity Keep routing short and minimize parasitic capacitance on CODEC_CLK line to preserve signal integrity 2 1 3 Antenna checklist Antenna shou...

Page 115: ...D 2 3 4 5 6 7 8 9 10 11 12 1 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 GND VCC VCC VCC GND SPI_MRDY GPIO14 SPI_SRDY GPIO13 SPI_MISO GPIO12 SPI_MOSI GPIO11 SPI_SCLK GPIO10 GPIO9 I2S1_WA GND GPIO8 I2S1_CLK RSVD CODEC_CLK GPIO5 VSIM SIM_RST SIM_IO SIM_CLK SDA SCL RSVD I2S_RXD RSVD I2S_CLK RSVD I2S_TXD RSVD I2S_WA GPIO7 I2S1_TXD GPIO6 I2S1_RXD 64 63 62 61 60 59 58 57 56 55 54 65 53 52 51 50 49 48 4...

Page 116: ... grounding See section 2 2 1 4 5th Sensitive Pin Careful Layout Avoid coupling with noisy signals See section 2 2 1 5 Backup Voltage V_BCKP Power On PWR_ON 6th High speed digital pins Careful Layout Avoid coupling with sensitive signals See section 2 2 1 6 SPI Signals SPI_SCLK SPI_MISO SPI_MOSI SPI_SRDY SPI_MRDY Clock Output CODEC_CLK 7th Digital pins and supplies Common Practice Follow common pra...

Page 117: ... on buried layer below ANT and ANT_DIV pads The transmission line from the ANT pad and the ANT_DIV pad up to antenna connector s or up to the internal antenna s pad must be designed so that the characteristic impedance is as close as possible to 50 The transmission line up to antenna connector or pad may be a microstrip consists of a conducting strip separated from a ground plane by a dielectric m...

Page 118: ...ance computation To achieve a 50 characteristic impedance the width of the transmission line must be chosen depending on the thickness of the transmission line itself e g 35 µm in the example of Figure 57 and Figure 58 the thickness of the dielectric material between the top layer where the transmission line is routed and the inner closer layer implementing the ground plane e g 270 µm in Figure 57...

Page 119: ...er s recommended layout GND layer under RF connectors and close to buried vias should be cut out in order to remove stray capacitance and thus keep the RF line 50 Ω In most cases the large active pad of the integrated antenna or antenna connector needs to have a GND keep out i e clearance at least on first inner layer to reduce parasitic capacitance to ground Note that the layout recommendation is...

Page 120: ...e DC DC output and minimize the VCC track length Otherwise consider using separate capacitors for DC DC converter and LISA U2 module tank capacitor Note that the capacitor voltage rating may be adequate to withstand the charger over voltage if battery pack is used The use of very large capacitors i e greater then 1000 µF must be carefully evaluated since the voltage at the VCC pins must ramp from ...

Page 121: ...ble to 90 Ensure the common mode characteristic impedance ZCM is as close as possible to 30 Consider design rules for USB_D USB_D similar to RF transmission lines being them coupled differential micro strip or buried stripline avoid any stubs abrupt change of layout and route on clear PCB area Figure 59 and Figure 60 provide two examples of coplanar waveguide designs with differential characterist...

Page 122: ...the host processor with a data rate up to 26 Mb s see Section 1 9 3 The high speed data rate is carried by signals SPI_SCLK SPI_MISO and SPI_MOSI while SPI_SRDY and SPI_MRDY behave as handshake signals with relatively low activity Digital Clock Output CODEC_CLK can be used to provide a 26 MHz or 13 MHz digital clock to an external audio codec Follow these hints for high speed digital pins layout H...

Page 123: ...g with RF line or sensitive analog inputs General Purpose I O GPIOx the general purpose input output pins are generally not critical for layout Reserved pins these pins are reserved for future use Leave them unconnected on the baseboard USB detection VUSB_DET this input will generate an interrupt to the baseband processor for USB detection The USB supply 5 0 V typ must be provided to VUSB_DET by t...

Page 124: ... form a T shape or equivalent extending beyond the copper mask The solder paste should have a total thickness of 150 µm The paste mask outline needs to be considered when defining the minimal distance to the next component The exact geometry distances stencil thicknesses and solder paste volumes must be adapted to the specific production processes e g soldering etc of the customer The implemetatio...

Page 125: ...ly separated from any other digital circuits on the system board Provide enough clearance between the module and any external part due to solder and paste masks design Milled edges that are present at module PCB corners away from module pins metallization can slightly increase module dimensions from the width and the height described in the mechanical specifications sections of LISA U2 series Data...

Page 126: ...wing 7 C during a GSM voice call at max TX power 19 C during GPRS data transfer with 4 TX slots at max TX power 16 C during EDGE data transfer with 4 TX slots at max TX power 25 C in UMTS HSxPA connection at max TX power The Module to Ambient thermal resistance value and the related increase of module temperature will be different for other mechanical deployments of the module e g PCB with differe...

Page 127: ... TX power 5 5 C in UMTS HSxPA connection at max TX power Beside the reduction of the Module to Ambient thermal resistance implemented by the hardware design of the application device integrating a LISA U2 module the increase of module temperature can be moderated by the software implementation of the application Since the most critical condition concerning module thermal power occurs when module c...

Page 128: ...ion 1 15 2 2 to preserve the original u blox FCC ID Some 2G and 3G bands are overlapping This depends on worldwide band allocation for telephony services where different bands are deployed for different geographical regions If LISA U2 series modules are planned for use on the entire supported bands then an antenna that supports the 824 960 MHz and the 1710 2170 MHz frequency range should be select...

Page 129: ...o application board select a short cable with minimum insertion loss The higher the additional insertion loss due to low quality or long cable the lower the connectivity Follow the recommendations of the antenna manufacturer for correct installation and deployment Do not include antenna within closed metal case Do not place the main antenna in close vicinity to end user since the emitted radiation...

Page 130: ... of the power is delivered to antenna and which portion is reflected by the antenna back to the module output A good antenna should have an S11 below 10 dB over the entire frequency band Due to miniaturization mechanical constraints and other design issues this value will not be achieved An S11 value of about 6 dB in the worst case is acceptable Figure 63 shows an example of this measurement Figur...

Page 131: ... tuned e g marker 3 in Figure 65 it is possible to make a judgment on the antenna under test if the performance is similar then the target antenna is good Figure 66 S11 and S21 comparison between a 900 MHz tuned half wavelength dipole green purple and a wideband commercial antenna yellow cyan Instead if S21 values for the tuned dipole are much better than the antenna under evaluation like for mark...

Page 132: ...WPENA GSM WCDMA SMD Antenna 824 960 MHz 1710 2170 MHz 35 0 x 5 0 x 6 0 mm Table 47 Examples of internal surface mount antennas Table 48 lists some examples of possible internal off board PCB type antennas with cable and connector Manufacturer Part Number Product Name Description Taoglas FXP14 A 07 0100A GSM WCDMA PCB Antenna with cable and U FL connector 824 960 MHz 1710 2170 MHz 70 4 x 20 4 mm Ta...

Page 133: ...onnector 824 960 MHz 1710 2170 MHz 527 x Ø 26 mm Taoglas FW 92 RNT M GSM WCDMA whip monopole Antenna with RP N type M connector 824 960 MHz 1710 2170 MHz 274 x Ø 20 mm Nearson T6150AM GSM WCDMA swivel monopole Antenna with SMA M connector 824 960 MHz 1710 2170 MHz 179 3 x 22 x 6 5 mm Laird Tech MAF94300 HEPTA SM GSM WCDMA swivel monopole Antenna with SMA M connector 824 960 MHz 1575 42 MHz 1710 21...

Page 134: ...t are reported in the following table Description Part Number Manufacturer DC Blocking Capacitor Murata GRM1555C1H220JA01 or equivalent RF Choke Inductor Murata LQG15HS68NJ02 LQG15HH68NJ02 or equivalent Self Resonance Frequency 1GHz Resistor for Diagnostic 15 k 5 various Manufacturers Table 50 Example of components for the antenna detection diagnostic circuit The DC impedance at RF port for some a...

Page 135: ...ollowing European Norms for device ESD immunity ESD testing standard CENELEC EN 61000 4 2 11 and the radio equipment standards ETSI EN 301 489 1 12 ETSI EN 301 489 7 13 ETSI EN 301 489 24 14 which requirements are summarized in Table 51 The ESD immunity test is performed at the enclosure port defined by ETSI EN 301 489 1 12 as the physical boundary through which the electromagnetic field radiates ...

Page 136: ...ements stated in the CENELEC EN 61000 4 2 11 ETSI EN 301 489 1 12 ETSI EN 301 489 7 13 and ETSI EN 301 489 24 14 Category Application Ref Design Immunity Level Remarks Contact Discharge to coupling planes indirect contact discharge Enclosure All 4 kV 4 kV Contact Discharges to conducted surfaces direct contact discharge Enclosure port All Not Applicable Test not applicable to u blox reference desi...

Page 137: ...contact discharge up to 4 kV 4 kV and protection to air discharge up to 8 kV 8 kV to the whole antenna and cable surfaces If the device implements an external antenna and the antenna and its connecting cable do not provide a completely insulated enclosure able to provide protection to direct contact discharge up to 4 kV 4 kV and protection to air discharge up to 8 kV 8 kV to the whole antenna and ...

Page 138: ...varistor should be mounted on the RESET_N line close to accessible point The RESET_N application circuit implemented in the EMC ESD approved reference designs of LISA U2 series moduels is described in Figure 20 and Table 19 section 1 6 3 SIM interface The following precautions are suggested for LISA U2 modules SIM interface VSIM SIM_RST SIM_IO SIM_CLK pins depending on the application board handli...

Page 139: ...s PESD0402 140 ESD protection device should be mounted on the USB_D and USB_D lines close to the accessible points i e close to the USB connector SPI interface a low capacitance i e less than 10 pF ESD protection device e g Infineon ESD8V0L2B 03L or AVX USB0002 should be mounted on the SPI_MISO SPI_MOSI SPI_SCLK SPI_MRDY SPI_SRDY lines close to accessible points CODEC_CLK a low capacitance i e les...

Page 140: ... or barred due to operators choices no cell condition when moving to poorly served or highly interfered areas In the latter case interference can be artificially injected in the environment by a noise generator covering a given spectrum thus obscuring the operator s carriers entitled to give access to the GSM UMTS service The Jamming Detection Feature detects such artificial interference and repor...

Page 141: ...sly If in addition the internal PDP context is used at most 2 external PDP contexts can be activated Secondary PDP contexts PDP contexts sharing the IP address of a primary PDP context are also supported Traffic Flow Filters for such secondary contexts shall be specified according to 3GPP TS 23 060 19 At most 2 secondary PDP contexts can be activated since the maximum number of PDP contexts both n...

Page 142: ...TLS profile and Table 55 to Table 59 report the main SSL TLS supported capabilities of the products For a complete list of supported configurations and settings see the u blox AT Commands Manual 2 Settings Value Meaning Certificates validation level Level 0 The server certificate will not be checked or verified Minimum SSL TLS version Any The server can use any of the TLS1 0 TLS1 1 TLS1 2 versions...

Page 143: ...RSA_WITH_RC4_128_SHA 0x00 0x05 NO11 TLS_PSK_WITH_AES_128_CBC_SHA 0x00 0x8C YES10 TLS_PSK_WITH_AES_256_CBC_SHA 0x00 0x8D YES10 TLS_PSK_WITH_3DES_EDE_CBC_SHA 0x00 0x8B YES10 TLS_RSA_PSK_WITH_AES_128_CBC_SHA 0x00 0x94 YES10 TLS_RSA_PSK_WITH_AES_256_CBC_SHA 0x00 0x95 YES10 TLS_RSA_PSK_WITH_3DES_EDE_CBC_SHA 0x00 0x93 YES10 TLS_PSK_WITH_AES_128_CBC_SHA256 0x00 0xAE YES10 TLS_PSK_WITH_AES_256_CBC_SHA384 ...

Page 144: ...enclosed or underground parking garages as well as in urban canyons where GNSS signals are blocked or jammed by multipath interference The situation can be improved by augmenting GNSS receiver data with cellular network information to provide positioning information even when GNSS reception is degraded or absent This additional information can benefit numerous applications 3 10 1 Positioning throu...

Page 145: ...ty of multiple cells provides increased accuracy based on the intersection of areas of visibility CellLocate is implemented using a set of two AT commands that allow configuration of the CellLocate service AT ULOCCELL and requesting position according to the user configuration AT ULOC The answer is provided in the form of an unsolicited AT command including latitude longitude and estimated accurac...

Page 146: ...S Implementation Application Note 16 for the complete description of the feature u blox is extremely mindful of user privacy When a position is sent to the CellLocate server u blox is unable to track the SIM used or the specific device 3 11Control Plane Aiding Location Services LCS Not supported by 01 x2 and 68 product versions With the Assisted GPS feature a location server provides the module wi...

Page 147: ...irst on GPS the latter on GLONASS positioning system When activated the in vehicle systems IVS automatically initiate an emergency call carrying both voice and data including location data directly to the nearest Public Safety Answering Point PSAP to determine whether rescue services should be dispatched to the known position Figure 69 eCall and ERA GLONASS automated emergency response systems dia...

Page 148: ...shown in Figure 71 Device including LISA SAP Serial Interface USB SAP channel or MUX SAP channel over UART or SPI GSM UMTS Interface Local SIM optional LISA module SAP Client Application Processor SAP Bluetooth Interface Bluetooth Transceiver Device including SIM Remote SIM Mobile Equipment SAP Server Bluetooth Transceiver Figure 71 Remote SIM access via Bluetooth and wired connection The applicat...

Page 149: ...working temperature range Temperature measurement is done inside the cellular module the measured value could be different from the environmental temperature Ta Warning area t 1 t 1 t 2 t 2 Valid temperature range Safe area Dangerous area Dangerous area Warning area Figure 72 Temperature range and limits The entire temperature range is divided into sub regions by limits see Figure 72 named t 2 t 1...

Page 150: ...ll in progress Shut the device down Yes No Yes Yes No No No Yes Send shutdown notification Feature enabled full logic or indication only IF Full Logic Enabled Feature disabled no action Temperature is within normal operating range Yes Tempetature is within warning area Tempetature is outside valid temperature range No Featuere enabled in full logic mode Feature enabled in indication only mode no f...

Page 151: ...mperature shutdown 97 C Equal to the internal temperature Ti measured in the worst case operating condition at typical supply voltage when the ambient temperature Ta in the reference setup equals the absolute maximum temperature rating upper limit of the extended temperature range LISA U2 module mounted on a 90 mm x 70 mm x 1 46 mm 4 Layers PCB with a high coverage of copper within climatic chambe...

Page 152: ...twork conditions see sections 1 5 3 3 1 9 2 3 Automatic periodic enable of the UART interface to receive and send data if AT UPSV 1 has been set see section 1 9 2 3 Data received on UART interface if HW flow control has been disabled by AT K0 and AT UPSV 1 has been set see section 1 9 2 3 RTS input set ON by the DTE if HW flow control has been disabled by AT K0 and AT UPSV 2 has been set see secti...

Page 153: ...ication 95 5 Sn 3 9 Ag 0 6 Cu 95 5 Tin 3 9 Silver 0 6 Copper 95 5 Sn 4 0 Ag 0 5 Cu 95 5 Tin 4 0 Silver 0 5 Copper Melting Temperature 217 C Stencil Thickness 150 µm for base boards The final choice of the soldering paste depends on the approved manufacturing procedures The paste mask geometry for applying soldering paste should meet the recommendations in section 2 2 2 The quality of the solder jo...

Page 154: ...ture 245 C Cooling phase A controlled cooling avoids negative metallurgical effects solder becomes more brittle of the solder and possible mechanical tensions in the products Controlled cooling helps to achieve bright solder fillets with a good shape and low contact angle Temperature fall rate max 4 C s To avoid falling off modules should be placed on the topside of the motherboard during solderin...

Page 155: ... use a no clean soldering paste and eliminate the cleaning step after the soldering 4 2 5 Repeated reflow soldering Only a single reflow soldering process is encouraged for boards with a LISA U2 module populated on it 4 2 6 Wave soldering Boards with combined through hole technology THT components and surface mount technology SMT devices require wave soldering to solder the THT components Only a s...

Page 156: ...d cables wick or other forms of metal strips directly onto the EMI covers is done at the customer s own risk The numerous ground pins should be sufficient to provide optimum immunity to interferences and noise u blox gives no warranty for damages to the LISA U2 modules caused by soldering metal cables or any other forms of metal strips directly onto the EMI covers 4 2 12 Use of ultrasonic processe...

Page 157: ...GPIOs digital interfaces Measurement and calibration of RF characteristics in all supported bands Receiver S N verification frequency tuning of reference clock calibration of transmitter and receiver power levels Verification of RF characteristics after calibration modulation accuracy power levels and spectrum performance are checked to be within tolerances when calibration parameters are applied ...

Page 158: ...Commands Manual 2 AT CSQ command rssi ber parameters These kinds of test may be useful as a go no go test but not for RF performance measurements This test is suitable to check the communication with host controller and SIM card the audio and power supply functionality and verify if components at antenna interface are well soldered 5 2 2 Functional tests providing RF operation Overall RF performan...

Page 159: ...must be connected to ANT pin To avoid module damage during receiver test the maximum power level received at ANT pin must meet module specifications The AT UTEST command sets the module to emit RF power ignoring 2G 3G signalling protocol This emission can generate interference that can be prohibited by law in some countries The use of this feature is intended for testing purpose in controlled envi...

Page 160: ...gger TX GMSK and 8PSK burst and WCDMA signal o To measure current consumption o To check if module components was damaged during soldering process or during handling ESD mechanical shock 4 Trigger RX measurement o To test receiver signal level Assuming that there are no losses between ANT pin or ANT_DIV pin and input power source be aware that the power level estimated by the module can vary appro...

Page 161: ...ck the PWR_ON behavior since LISA U2 series modules can be switched off forcing PWR_ON pin to the low level for at least 1 s Check the PWR_ON input voltage thresholds since they are slightly changed in comparison to LISA U1 series modules By the way this is not relevant driving the PWR_ON input by an open drain or open collector driver as recommended Check the RESET_N input voltage thresholds sinc...

Page 162: ... antenna input for Rx diversity on the pin 74 named ANT_DIV it has an impedance of 50 Ω The same pad is a reserved pin on LISA U1 series and on the other LISA U2 series modules Analog audio interfaces are not supported by LISA U2 series modules but a second 4 wire I 2 S digital audio interface is provided instead of the 4 analog audio pins The same 4 pins can be configured as GPIO on LISA U2 serie...

Page 163: ...7 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 GND VCC VCC VCC GND SPI_MRDY SPI_SRDY SPI_MISO SPI_MOSI SPI_SCLK RSVD SPK_N GND RSVD SPK_P RSVD GPIO5 VSIM SIM_RST SIM_IO SIM_CLK SDA SCL RSVD I2S_RXD RSVD I2S_CLK RSVD I2S_TXD RSVD I2S_WA 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 V_BCKP GND V_INT RSVD GND GND GND DSR RI DCD DTR GND RTS CTS TXD RXD GND VUSB_DET PWR_ON GPIO1 ...

Page 164: ...river strength 2 mA 11 DCD UART data carrier detect output DCD UART data carrier detect output Circuit 109 DCD in ITU T V 24 1 8V typ LISA U1 series o Output driver strength 4 mA LISA U2 series o Output driver strength 2 mA 12 DTR UART data terminal ready input DTR UART data terminal ready input Circuit 108 2 DTR in ITU T V 24 1 8V typ LISA U1 series o Internal active pull up 110 µA LISA U2 series...

Page 165: ... GPIO 1 8V typ LISA U1 series o Output driver strength 1 mA LISA U2 series o Output driver strength 6 mA Functions on all LISA U series o Pad disabled default o Input Output o Network Status Indication o GNSS Supply Enable o GSM Tx Burst Indication Function on LISA U2 series o Module Status Indication 21 GPIO2 GPIO GPIO2 GPIO Configurable GPIO 1 8V typ LISA U1 series o Output driver strength 1 mA ...

Page 166: ...D input output No difference 28 38 GND Ground GND Ground 39 MIC_N LISA U120 LISA U130 Differential analog audio input neg LISA U100 LISA U110 RESERVED pin I2S1_RXD GPIO6 LISA U2 series 2nd I2 S Rx data input GPIO LISA U120 LISA U130 Differential analog audio input neg LISA U2 series I2S1_RXD and configurable GPIO 1 8V typ o Output driver strength 1 mA o Internal active pull down 150 µA Functions o...

Page 167: ... LISA U1 series I2 C SCL for GNSS 1 8V typ o Fixed open drain o External pull up e g to V_INT required LISA U2 series I2 C SCL for GNSS and other I2 C devices 1 8V typ o Fixed open drain o External pull up e g to V_INT required 46 SDA I2 C bus data line input output SDA I2 C bus data line input output LISA U1 series I2 C SDA for GNSS 1 8V typ o Fixed open drain o External pull up e g to V_INT requ...

Page 168: ... Differential analog audio output neg LISA U2 series I2S1_WA and configurable GPIO 1 8V typ o Output driver strength 1 mA o Internal active pull down 150 µA Functions o I2S1_WA default o Pad disabled o Input Output 55 SPI_SCLK SPI Serial Clock Input SPI_SCLK GPIO10 SPI Serial Clock Input GPIO LISA U1 series SPI_CLK 1 8V typ o Internal active pull down 100 µA LISA U2 series SPI_CLK and configurable...

Page 169: ...nd 61 63 VCC Module supply input VCC Module supply input VCC operating voltage difference LISA U1 series o VCC normal range 3 4 V min 4 2 V max o VCC extended range 3 1 V min 4 2 V max LISA U2 series o VCC normal range 3 3 V min 4 4 V max o VCC extended range 3 1 V min 4 5 V max 64 67 GND Ground GND Ground 68 ANT RF antenna ANT RF input output for main Tx Rx antenna 3G band support difference LISA...

Page 170: ...85 mm 22 4 mm 5 3 mm 5 25 mm 1 4 mm 1 0 mm PIN 1 LISA U1 bottom side through module view Exposed GND on LISA U1 module bottom layer Signals keep out area on application board Figure 79 Signals keep out area on the top layer of the application board below LISA U1 series modules 33 2 mm 5 25 mm 22 4 mm 5 3 mm 5 25 mm 5 3 mm 1 3 mm 1 4 mm 1 0 mm PIN 1 LISA U2 bottom side through module view Exposed G...

Page 171: ...uipment DTM Dual Transfer Mode DTR Data Terminal Ready EBU External Bus Interface Unit EDGE Enhanced Data rates for GSM Evolution E GPRS Enhanced GPRS FDD Frequency Division Duplex FEM Front End Module FOAT Firmware Over AT commands FTP File Transfer Protocol FTPS FTP Secure GND Ground GNSS Global Navigation Satellite System GPIO General Purpose Input Output GPRS General Packet Radio Service GPS G...

Page 172: ... RI Ring Indicator RTC Real Time Clock RTS Request To Send RXD RX Data SAW Surface Acoustic Wave SIM Subscriber Identification Module SMS Short Message Service SMTP Simple Mail Transfer Protocol SPI Serial Peripheral Interface SRAM Static RAM TCP Transmission Control Protocol TDMA Time Division Multiple Access TXD TX Data UART Universal Asynchronous Receiver Transmitter UDP User Datagram Protocol ...

Page 173: ...equirements 13 ETSI EN 301 489 7 V1 3 1 Electromagnetic compatibility and Radio spectrum Matters ERM ElectroMagnetic Compatibility EMC standard for radio equipment and services Part 7 Specific conditions for mobile and portable radio and ancillary equipment of digital cellular radio telecommunications systems GSM and DCS 14 ETSI EN 301 489 24 V1 4 1 Electromagnetic compatibility and Radio spectrum...

Page 174: ...nna gain A4 20 Jun 2012 sses Update to Advance Information status Updated PWR_ON behavior Updated UART and power saving behavior Added 3V 1 8V SPI application circuit Updated GPS RTC sharing application circuit Added remote SIM access profile description A5 24 Aug 2012 sses Update to Preliminary status Updated Federal Communications Commission notice Updated recommended VCC bypass capacitors Added...

Page 175: ...port_ap u blox com Regional Office China Beijing Phone 86 10 68 133 545 E mail info_cn u blox com Support support_cn u blox com Regional Office China Chongqing Phone 86 23 6815 1588 E mail info_cn u blox com Support support_cn u blox com Regional Office China Shanghai Phone 86 21 6090 4832 E mail info_cn u blox com Support support_cn u blox com Regional Office China Shenzhen Phone 86 755 8627 1083...

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