SARA-R4 series - System Integration Manual
UBX-16029218 - R06
Design-in
Page 34 of 102
2
Design-in
2.1
Overview
For an optimal integration of SARA-R4 series modules in the final application board follow the design guidelines
stated in this section.
Every application circuit must be properly designed to guarantee the correct functionality of the relative
interface, however a number of points require high attention during the design of the application device.
The following list provides a rank of importance in the application design, starting from the highest relevance:
1.
Module antenna connection:
ANT
and
ANT_DET
pins.
Antenna circuit directly affects the RF compliance of the device integrating a SARA-R4 series module with
applicable certification schemes. Follow the suggestions provided in the relative section 2.4 for schematic
and layout design.
2.
Module supply:
VCC
and
GND
pins.
The supply circuit affects the RF compliance of the device integrating a SARA-R4 series module with
applicable required certification schemes as well as antenna circuit design. Very carefully follow the
suggestions provided in the relative section 2.2.1 for schematic and layout design.
3.
USB interface:
USB_D+
,
USB_D-
and
VUSB_DET
pins.
Accurate design is required to guarantee USB 2.0 high-speed interface functionality. Carefully follow the
suggestions provided in the relative section 2.6.2 for schematic and layout design.
4.
SIM interface:
VSIM
,
SIM_CLK
,
SIM_IO
,
SIM_RST
pins.
Accurate design is required to guarantee SIM card functionality reducing the risk of RF coupling. Carefully
follow the suggestions provided in the relative section 2.5 for schematic and layout design.
5.
System functions:
RESET_N
,
PWR_ON
pins.
Accurate design is required to guarantee that the voltage level is well defined during operation. Carefully
follow the suggestions provided in the relative section 2.3 for schematic and layout design.
6.
Other digital interfaces: UART, SPI, SDIO, I
2
C, I
2
S, GPIOs and Reserved pins.
Accurate design is required to guarantee proper functionality and reduce the risk of digital data frequency
harmonics coupling. Follow the suggestions provided in sections 2.6.1, 2.6.2, 2.6.3, 2.6.4, 2.6.5, 2.7, 2.8
and 2.9 for schematic and layout design.
7.
Other supplies:
V_INT
generic digital interfaces supply.
Accurate design is required to guarantee proper functionality. Follow the suggestions provided in the
corresponding section 2.2.2 for schematic and layout design.
It is recommended to follow the specific design guidelines provided by each manufacturer of any external
part selected for the application board integrating the u-blox cellular modules.
